Dataman 448PRO2 User Manual page 88

group Addresses:
device start address (default 0)
device end address
buffer start address
Split
This option allows setting special mode of buffer when programming or reading device. Using
split options is particularly useful when using 8-bit data memory devices in 16-bit or 32-bit
applications.
Following table describes buffer to device and device to buffer data transfer
Split type Device
None Device [ADDR]
Even Device [ADDR]
Odd Device [ADDR]
1/4 Device [ADDR]
2/4 Device [ADDR]
3/4 Device [ADDR]
4/4 Device [ADDR]
Real addressing will be following: (all addresses are hexadecimal)
Split type Device addresses
None 00 01 02 03 04 05
Even 00 01 02 03 04 05
Odd 00 01 02 03 04 05
1/4 00 01 02 03 04 05
2/4 00 01 02 03 04 05
3/4 00 01 02 03 04 05
4/4 00 01 02 03 04 05
Terms explanation:
Access to device address ADDR is written as Device [ADDR].
Access to buffer address ADDR is written as Buffer [ADDR].
ADDR value can be from zero to device size (in bytes).
All addresses are byte oriented addresses.
group Insertion test:
insertion test
If enabled, the programmer checks all pins of the programmed chip, if have proper connection
to the ZIF socket (continuity test). The programmer is able to identify the wrong contact,
misinserted chip and also (partially) reversely inserted chip.
Device ID check error terminates the operation
Programmer provides ID check before each selected action. It compares read ID codes from
device with ID codes defined by device manufacturer. In case of ID error, control program
behaves as follows:
if item is set to ENABLE, selected action is finished
if item is set to DISABLE, selected action continues. Control program just writes warning
message about ID error to LOG window.
If enabled, the programmer checks the electronic ID of the programmed chip.
Note 1: Some old chips don't carry electronic ID.
(default device size-1)
(default 0)
(default none)
Buffer Address assignment
Buffer [ADDR]
Buffer [2*ADDR]
Buffer [1+ (2*ADDR)]
Buffer [4*ADDR]
Buffer [1+(4*ADDR)]
Buffer [2+(4*ADDR)]
Buffer [3+(4*ADDR)]
Buffer addresses
00 01 02 03 04 05
00 02 04 06 08 0A
01 03 05 07 09 0B
00 04 08 0C 10 14
01 05 09 0D 11 15
02 06 0A 0E 12 16
03 07 0B 0F 13 17
(default ENABLE)
(default ENABLE)
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