Ich9-M 3/5, Gpio, Pwr Management - EUROCOM TN120T Service Manual

ICH9-M 3/5, GPIO, PWR Management

3. 3V
8 1 G PI O13
R N1 5 7 2 SW I #
8P 4R X10K _04 6 3 LAN _PW R
G PI O60
5 4
8 1 PM_SYSR ST#
SB_ BATLOW #
R N1 8 7 2
SB_ BLON
8P 4R X10K _04 6 3
5 4 AC _PRESE NT
R 132 10K_04 PC I E_W AKE#
R 288 *10K_04 PW R _BTN#
R 257 10K_04 I CH _SMBD AT1
R 110 10K_04 I CH _SMBC LK1
R 258 *100K_04 G PI O24
R 106 10K_04 SU S_PWR _ACK
R 259 2.2 K_04 I CH _SMBD AT0
R 133 2.2 K_04 I CH _SMBC LK0
3. 3VS
R 254 *10K_04 PM_STPPC I #
R 131 *10K_04 PM_STPC PU #
R 282 10K_04 SATA_CLKR EQ#
R 162 100K_04 G PI O17
R 136 8.2 K_04 SER I RQ
R 298 8.2 K_04 PM_TH RM#
R 285 8.2 K_04 PM_CLKRU N #
R 297 *10K_04 MCH _IC H_ SY NC #
R 300 100K_04 O DD _DETEC T#
R 301 100K_04 SMI #
R 174 100K_04 SC I #
1 8 SATA0GP
R N2 2 2 7 SATA4GP
8P 4R X10K _04 3 6 SATA5GP
4 5 SATA1GP
R 119 10K_04 SB_ LANR ST#
R 286 *100K_04 PM_DPR SLPVR
R 111 1M_04 VR M_PW RG D
R 100 10K_04 R SMRST#
C 192 100P_50V_04
R 256 100K_04 G PI O9
3.3VS
VCORE PWRGD
R 112
10K_04
VR M_PW RGD
C 209
G 0. 03 3U _16V_X7R _04
29 C LK EN#
Q7
2N 7002W
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U 19C
I CH _SMBC LK0 G16
10,11, 17 I CH _S MBC LK 0
DDR 2, CLK G EN I CH _SMBD AT0 A13
10,11, 17 I CH _S MBD AT0
G PIO 60 E17
I CH _SMBC LK1 C17
19 I CH _S MBC LK 1
NEW CARD, M INI CARD I CH _SMBD AT1 B18
19 I CH _S MBD AT1
SW I# F19
22 SW I#
LPCPD #
R 4
19 LPC PD #
PM_SY SR ST# G19
M6
5 PM_SY NC #
LAN_ PW R A17
PM_STPPC I# A14
17 PM_STP PCI #
PM_STPC PU# E19
17 P M_STP CPU #
PM_C LKRU N# L4
19,22 P M_CLKR UN #
PC IE_W AKE# E20
19,23 P CI E_W AKE#
SER IR Q M5
19, 22 SER IR Q
PM_TH RM# AJ23
2 PM_TH R M#
VR M_PW RG D D21
A20
SMI# AG19
22 SMI#
O DD _D ETECT# AH21
23 O D D_DETEC T#
SC I# AG21
22 SC I#
A21
SB_BLO N C12
18 SB_ BLO N
G PIO 13 C21
G PIO 17 AE18
G PIO 18 K1
G PIO 20 AF8
SBSPI _WP# AJ22
13 SBSPI _W P#
A9
D19
SATA_C LKR EQ# L1
1 7 SATA_CLKR EQ#
C R_CP PEN# AE19
20 C R _C PPEN #
AG22
AF21
AH24
C LG PIO 5
A8
1 3 CLGP IO5
I CH _SP KR M7
2 1 I C H_SPKR
MCH _I C H_SY NC # AJ24
5 MCH _I C H_SYN C #
B21
AH20
AJ20
AJ21
3. 3VS
R108
3. 24K_ 1%_04
CL_VR EF0 C L_ VR EF1
1 2mils
C 205 R113
0.1U_ 10V_ X 7R _04 453_1%_06
CL_VRET0/1=0.405V
AH 23 SATA0G P
SMBC LK SATA0GP/ GPI O 21
AF19 SATA1G P
SMBD ATA SATA1GP/ GPI O 19
AE21 SATA4G P
LI NK ALER T#/ GPI O60/C LG PI O4 SATA4GP/ GPI O 36
AD 20 SATA5G P
SMLI NK0 SATA5GP/ GPI O 37
SMLI NK1
H 1 C LK_ IC H 14
C LK14 CLK_IC H14 17
AF3 C LK_ IC H 48
CLK_IC H48 17
RI # C LK48
P1 SU SCLK
SUS_ STAT#/ LPC PD # SUSC L K
SYS_ R ESET#
C 16 SLP_S3
SLP_S3# SLP _S3# 1 6
SU SC#
E16
PMSY N C# /GPI O0 SLP_S4# SUS C#
G17 SLP_S5#
SLP_S5#
SMBA LER T#/ GPI O11
C 10 S4_STATE#
S4 _STATE#/ GPI O 26
STP_PC I#
G20 SB_PWR O K
SB_PWR OK 16
STP_C PU# PWR O K
PM_D PR SLPVR
M2
CLKR UN # D PR SLPV R/ GPI O 16 PM_D PRSLPVR 5, 29
B13 SB_BATLO W#
WAK E# BATL OW#
SERI R Q
R 3 PW R_BTN#
PWR _BTN # 22
TH RM# PWR BTN#
SB_LAN R ST#
D 20
VRMPW RGD LAN_R ST#
D 22 R 120 1 00_04 RSMR ST#
TP11 RSMR ST#
C LK_ PW RGD
R 5
GPI O 1 C K_PW R GD CLK_PWR G D 17
GPI O 6
R 6 C L_PWR O K
CL_PWR OK 5, 16,18 ,22
GPI O 7 CLPWR OK
GPI O 8
B16 SLP_M#
GPI O 12 SLP_M#
GPI O 13
C L_CLK0
F24
GPI O 17 C L_C LK0 CL_CLK0 5
C L_CLK1
B19
GPI O 18 C L_C LK1 CL_CLK1 1 9
GPI O 20
F22 C L_DATA0
SCLO CK/ GP IO22 C L_DA TA0 CL_DATA0 5
C L_DATA1
C 19
GPI O 27 C L_DA TA1 CL_DATA1 19
GPI O 28
C 25
C L_VR EF0
SATA CLKRE Q#/G PI O3 5 CL_VR EF0
A19
SLOAD /G PIO 38 CL_VR EF1 C L_VR EF1
SDATAOUT0/GPIO39
F21 C L_RST#0
CL_RST#0 5
SDATAOUT1/GPIO48 CL_R ST0#
C L_RST#1
D 18
GPI O 49 CL_R ST1# CL_RST#1 19
GPI O 57/C LGPI O5
A16 G PIO 24
MEM_LE D/ GPI O 24
C 18 SU S_PW R _AC K
SPKR G PIO 10/ SUS_PW R_AC K SUS _PW R_AC K 22
C 11 AC _PR ESEN T
MC H _SY NC # GPI O 14/AC _ PRESE NT AC_PR ESEN T 22
C 20 G PIO 9
TP3 WOL_EN /G PI O9
TP8
TP9
TP10
I CH 9- M BASE SLB8Q
3.3V
R 253
3.24K _1%_04
12mil s
C470 R 252
0. 1U _10V_X7R _04 453_1 %_06
2, 12, 13,15,16, 18, 19,23, 24, 27,28 3. 3V
5,8,9,10, 11, 12,13,15, 17, 18,19, 20, 21,2 2,23, 24 ,25,2 9 3 . 3VS
ICH9-M 3/5, GPIO, PWR Management B - 15
Schematic Diagrams
2 2
Sheet 14 of 37
ICH9-M 3/5, GPIO,
R SMR ST# 16, 22
PWR Management
Zo= 55O? 5%
Zo= 55O? 5%