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SuperServer 6029TP-HTR/HC0R/HC1R User's Manual
CPU Configuration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.
Processor Configuration
The following CPU information will be displayed:
Processor BSP Revision
Processor Socket
Processor ID
Processor Frequency
Processor Max Ratio
Processor Min Ratio
Microcode Revision
L1 Cache RAM
L2 Cache RAM
L3 Cache RAM
Processor 0 Version
Processor 1 Version
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where
it cannot, thus preventing a worm or a virus from flooding illegal codes to overwhelm the
processor, damaging the system during a virus attack. The options are Enable and Disable.
(Refer to Intel and Microsoft websites for more information.)
Intel Virtualization Technology
Select Enable to use Intel Virtualization Technology which will allow the I/O device
assignments to be directly reported to the VMM (Virtual Memory Management) through the
DMAR ACPI tables. This feature offers fully-protected I/O resource-sharing across the Intel
platforms, providing the user with greater reliability, security and availability in networking
and data-sharing. The settings are Enable and Disable.
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PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.
Adjacent Cache Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable
and Enable.
Note: Please power off and reboot the system for the changes you've made to take effect.
Please refer to Intel's website for detailed information.
DCU Streamer Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch
data streams from the cache memory to the DCU (Data Cache Unit) to speed up data
accessing and processing for CPU performance enhancement. The options are Disable
and Enable.
DCU IP Prefetcher
If this feature is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch
IP addresses to improve network connectivity and system performance. The options are
Enable and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance
CPU performance. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI)
to ensure data security. The options are Enable and Disable.
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Chapter 4: BIOS
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