Quectel LTE-A Series Hardware Design page 42

For more details about the specifications of USB 2.0, please visit this website down below:
https://www.usb.org/document-library/usb-20-specification.
It is recommended to reserve in your designs the USB interface for firmware upgrades. Below is a
reference design of USB 2.0 interface.
Module
USB_VBUS
USB_DM
USB_DP
USB_ID*
In order to ensure the signal integrity of USB data lines, R1, R2, R3 and R4 should be placed close to the
module as well as to each other. The extra stubs of trace must be as short as possible.
To meet USB 2.0 specifications, the following principles should be complied with while designing the USB
interface:
⚫
It is important to route the USB signal traces as a differential pair with total grounding. Keep the
impedance of the pair at 90 Ω.
⚫
Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces.
Route the USB differential traces in inner-layers of the PCB, and surround the traces with ground on
the same layer and with ground planes on adjacent layers.
⚫
Pay attention to the influence of junction capacitance of ESD protection components on USB data
traces. Typically, the capacitance value of ESD protection components should be less than 2.0 pF for
USB 2.0.
⚫
Keep the ESD protection components as close to the USB connector as possible.
⚫
If possible, reserve a 0 ohm resistor on USB_DP and USB_DM lines respectively.
EG060V-EA_Hardware_Design
Minimize these stubs
R3
R4
VDD
R1
R2
Close to Module
GND
Figure 20: Reference Design of USB Interface
EG060V-EA Hardware Design
Test Points
NM_0R
NM_0R
ESD Array
0R
0R
LTE-A Module Series
MCU
USB_DM
USB_DP
GPIO
GND
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