FXCPU Structured Programming Manual
[Device & Common]
1.2
Program Memory and Devices
1.2.1
Memory structure
1. FX
and FX
3U
3UC
Built-in device memory(RAM)
[Bit device memory]
Contact image memory
Input relay (X)
Auxiliary relay (M) State relay (S)
Timer contact, time counting coil,
counter contact, counting coil and reset coil
Built-in program memory(RAM)
Parameter
Sequence program
Comment
File register (D)
Special setting
Symbolic information *1
*1. Supported in Ver. 3.00 or later.
PLCs
CPU
Output relay (Y)
The PLC automatically recognizes attachment of
an optional memory (when the power is turned ON),
and isolates the built-in program memory.
(The PLC gives the priority to the optional memory.)
1.2 Program Memory and Devices
System ROM
[Data memory]
Data register (D)
Timer current value register (T)
Counter current value register (C)
Index register (V and Z)
Extension register (R)
Optional memory
(Flash memory)
Parameter
Sequence program
Comment
File register (D)
Special setting
Symbolic information *1
Extension file register (ER)
1 Device Outline
1
2
3
4
5
6
7
17