Mitsubishi Electric MELSEC-Q Structured Programming Manual page 23

FXCPU Structured Programming Manual
[Device & Common]
5. FX /FX /FX
0S 0 0N
Built-in device memory(RAM, EEPROM)
Contact image memory
Input relay (X)
Auxiliary relay (M) State relay (S)
Timer contact, time counting coil, reset coil (T),
counter contact, counting coil and reset coil (C)
Built-in program memory
(RAM, EEPROM)
Parameter
Sequence program
Comment
File register (D)
The PLC automatically recognizes attachment of
an optional memory
and isolates the built-in program memory.
(The PLC gives the priority to the optional memory.)
*1. Optional memory cannot be connected to FX
*2. FX /FX
0S 0
/FX /FX PLCs
U 2C
CPU
[Bit device memory]
Output relay (Y)
*2
*1
(when the power is turned ON),
PLCs do not support file registers.
1.2 Program Memory and Devices
System ROM
[Data memory]
Data register (D)
Timer current value register (T)
Counter current value register (C)
Index register (V and Z)
Optional memory
(RAM,EEPROM,EPROM)
Parameter
Sequence program
Comment
File register (D)
/FX PLCs.
0S 0
1 Device Outline
*1
*2
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