Furuno FELCOM 15 Service Manual page 146

Scrambling
Scrambling prevents 0 or 1 from continuing excessively; if 0 or 1 continues, clock
recovery would be reduced at the BPSK modulator. For scrambling, the output is
gained by inputting to the output from the scramble generator and the modulo-2 adder
(exclusive OR).
Convolutional Encoding
The convolutional encoding is a method that the receiving side controls to decrease the
random error occurred at the communication path so that the redundancy bit is added
to the data bit. The convolutional encoder used by the Inmarsat C consists of the 7 bits
shift register (constraint length-7) and two modulo-2 adderes (exclusive OR). The
scrambled bit string is output as the half-rate coded symbols.
G1=X0+X2+X3+X5 + X6
Formatted
(Scrambled) data
Start state
: 0 0 0 0 0 0
G2=X0+X1+X2+X3 + X6
Scrambling
Generator
+
G=X3+X4+X5+X7
LSB
X0 X1
X2 X3
Start state
: 1000000
Fig. AP1.3.6 Scrambling
exclusive OR
+
X0 X1 X2 X3 X4
+
exclusive OR
Fig. AP1.3.7 Encoding
AP1-23
AP1.3 Channel types and Signal processing
Data
DATA
G
Modulo-2 adder
(exclusive OR)
MSB
(Shift Register)
X4 X5 X6 X7
G1
X5 X6
G2
OUT
+
(To encoder)
Coded symbols
(To interleaver)
(Half-rate: Output of 2 bits
with input of 1 bit)