NAiS FP Series Hardware Manual page 182

FP0 Hardware
Addresses
T32CP Other Types
DT90060 DT9060
DT90061 DT9061
DT90062 DT9062
DT90063 DT9063
DT90064 DT9064
DT90065 DT9065
DT90066 DT9066
DT90067 DT9067
DT90104 DT9104
DT90105 DT9105
DT90106 DT9106
DT90107 DT9107
DT90108 DT9108
DT90109 DT9109
DT90110 DT9110
DT90111 DT9111
Matsushita Electric Works (Europe) AG
Description
Process Step ladder process
number: Indicates the startup condition of the step ladder process. When the
proccess starts up, the bit corresponding to the process number turns
0 to 15
on "1".
Process
Monitor using binary display.
number:
16 to 31
Process
DT9060
number:
32 to 47
Process
number:
48 to 63
Process
A programming tool can be used to write data.
number:
64 to 79
Process
number:
80 to 95
Process
number:
96 to 111
Process
number:
112 to 127
High-speed counter elapsed value area for ch2
The elapsed value (24–bit data) for the high–speed counter is stored here. Each time
the ED instruction is executed, the elapsed value for the high–speed counter is auto-
matically transferred to the special registers DT9104 and DT9105.
The value can be written by executing a DMV (F1) instruction.
High-speed counter target value area for ch2
The target value (24–bit data) of the high–speed counter specified by the high–speed
counter instruction is stored here. counter instruction is stored here.
Target values have been preset for the various instructions, to be used when the
high–speed counter related instruction F166 to F170 is executed. These preset val-
ues can only be read, and cannot be written.
High-speed counter elapsed value area for ch3
The elapsed value (24–bit data) for the high–speed counter is stored here. Each time
the ED instruction is executed, the elapsed value for the high–speed counter is auto-
matically transferred to the special registers DT9108 and DT9109.
The value can be written by executing a DMV (F1) instruction.
High-speed counter target value area for ch3
The target value (24–bit data) of the high–speed counter specified by the high–speed
counter instruction is stored here. counter instruction is stored here.
Target values have been preset for the various instructions, to be used when the
high–speed counter related instruction F166 to F170 is executed. These preset val-
ues can only be read, and cannot be written.
C.1 Special Data Registers
15 15 11 11 7 7 3 3
15 11 7 3
0: not–executing
1: executing
0 (Bit No.) 0
0 (Process No.)
C-9