NAiS FP Series Hardware Manual page 165

System Registers
Address Name of system register
Input 401 High-speed
counter mode
setting
settings (X3 to
X5)
Notes
If the operation mode is set to 2–phase, individual, or direction
differentiation, the setting for CH3 is invalid.
If reset input settings overlap, the setting of CH3 takes
precedence.
If system register 400 to 403 have been set simultaneously for
the same input relay, the following precedence order is
effective: [High–speed counter] –> [Pulse catch] –> [Interrupt
input].
A-10
Default
value
Setting by H0
FPWIN Pro,
NPST-GR Ver.
4, or FPWIN GR
Set value (parameter)
CH2 0: Do not set input X3 as high-speed
counter.
1: 2-phase input (X3, X4)
2: 2-phase input (X3, X4), Reset input (X5)
3: Incremental input (X3)
4: Incremental input (X3), Reset input (X5)
5: Decremental input (X3)
6: Decremental input (X3), Reset input
(X5)
7: Individual input (X3, X4)
8: Individual input (X3, X4), Reset input
(X5)
9: Direction decision (X3, X4)
10:Direction decision (X3, X4), Reset input
(X5)
CH3 0: Do not set input X4 as high-speed
counter.
3: Incremental input (X4)
4: Incremental input (X4), Reset input (X5)
5: Decremental input (X4)
6: Decremental input (X4), Reset input
(X5)
Matsushita Electric Works (Europe) AG
FP0 Hardware