NAiS FP Series Hardware Manual page 163

System Registers
Address Name of system register
Input 400 High-speed
setting counter mode
settings (X0 to
X2)
Notes
If the operation mode is set to 2–phase, individual, or direction
differentiation, the setting for CH1 is invalid.
If reset input settings overlap, the setting of CH1 takes
precedence.
If system register 400 to 403 have been set simultaneously for
the same input relay, the following precedence order is
effective: [High–speed counter] –> [Pulse catch] –> [Interrupt
input].
A-8
Default
value
Setting by H0
FPWIN Pro,
NPST-GR Ver.
4, or FPWIN
GR
Set value (parameter)
CH0 0: Do not set input X0 as high-speed count-
er.
1: 2-phase input (X0, X1)
2: 2-phase input (X0, X1),
Reset input (X2)
3: Incremental input (X0)
4: Incremental input (X0),
Reset input (X2)
5: Decremental input (X0)
6: Decremental input (X0),
Reset input (X2)
7: Individual input (X0, X1)
8: Individual input (X0, X1),
Reset input (X2)
9: Direction decision (X0, X1)
10:Direction decision (X0, X1),
Reset input (X2)
CH1 0: Do not set input X1 as high-speed count-
er.
3: Incremental input (X1)
4: Incremental input (X1),
Reset input (X2)
5: Decremental input (X1)
6: Decremental input (X1),
Reset input (X2)
Matsushita Electric Works (Europe) AG
FP0 Hardware