Spi; Can Bus; Manufacturing/Jtag Interface; Power Control - Congatec Qseven conga-QMX6 User Manual

Nxp i.mx6 arm cortex a9 processor with ultra low power consumption

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5.11

SPI

The NXP

i.MX6 processor provides Enhanced Configurable Serial Peripheral Interfaces (ECSPIs) capable of up to 66 Mbps write speed and 31

Mbps read speed. The ECSPI interfaces offer full-duplex, synchronous serial interface with maximum operation frequency up to the reference

clock frequency. It can be configured to support Master/Slave modes and four chip selects to support multiple peripherals.

The conga-QMX6 offers one SPI interface on the edge finger connector. Another SPI interface from the NXP

the 32 Mbit SPI Flash memory onboard the conga-QMX6. The NXP

in the SPI flash memory.

5.12

The conga-QMX6 supports CAN bus. The CAN controller performs communication in accordance with the CAN Protocol Version 2.0B Active1

(standard format and extended format). The bit rate can be programmed to a maximum of 1 Mbit/s, based on the technology used. To connect

the CAN controller module to the CAN bus, it is necessary to add transceiver hardware. A complete description of the CAN controller registers

and functionality is beyond the scope of this user's guide. Consult NXP's i.MX6 processor reference manual for additional information about

this interface.

5.13

The manufacturing signals defined in Qseven Specification 2.0 are reserved for either manufacturing or debugging purposes. The conga-

QMX6 offers this interface as a 10-pin JTAG interface, for debugging purposes. This interface is connected to the JTAG controller of the NXP

i.MX6 processor. The JTAG control fuses are used to allow or disallow JTAG access to secured resources.

Note

For compatible JTAG adapters, contact the congatec support team or order the Nit6X_JTAG from Boundary Devices.

5.14

PWGIN

The PWGIN (pin 26) can be connected to an external power good circuit or it may also be utilized as a manual reset input. To use PWGIN as a

manual reset input, the pin must be grounded through the use of a momentary-contact push-button switch. When external circuitry asserts this

signal, it is necessary that an open-drain driver drives this signal causing it to be held low for a minimum of 16ms to initiate a reset. Using this

input is optional. For more information, see the note below.

i.MX6 processor is programmed to boot from the bootloader contained

QMX6m12

i.MX6 processor is connected to

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