Table 19
LPC/GPIO Signal Descriptions
Signal
Pin # Description
LPC_AD0
185
Multiplexed Command, Address and Data (LPC_AD[0..3]).
GPIO0
Shared with General Purpose Input/Output [0..3]
LPC_AD1
186
GPIO1
LPC_AD2
187
GPIO2
LPC_AD3
188
GPIO3
LPC_FRAME#
190
LPC frame indicates the start of a new cycle or the termination
GPIO5
of a broken cycle. Shared with General Purpose Input/Output 5
LPC_LDRQ#
192
LPC DMA request.
GPIO7
General Purpose Input/Output 7
LPC_CLK
189
LPC clock.
GPIO4
General Purpose Input/Output 4
SERIRQ
191
Serialized Interrupt.
GPIO6
General Purpose Input/Output 6
Note
The eight LPC pins are configured by default as GPIO's. Additional eight GPIO pins can be achieved by configuring SDIO pins as GPIO. This
can be programmed in the bootloader and in the kernel.
The conga-QMX6 does not support LPC interface.
Table 20
SPI Interface Signal Descriptions
Signal
Pin #
Description
SPI_MOSI
199
Master serial output/Slave serial input signal. SPI serial output data from
Qseven
®
module to the SPI device.
SPI_MISO
201
Master serial input/Slave serial output signal. SPI serial input data from the SPI
device to Qseven
SPI_SCK
203
SPI clock output.
SPI_CS0#
200
SPI chip select 0 output.
SPI_CS1#
202
SPI Chip Select 1 signal is used as the second chip select when two devices are
used. Do not use when only one SPI device is used.
Copyright © 2013 congatec AG
®
module.
I/O
PU/PD Comment
I/O 3.3V
Shared with GPIO0
Shared with GPIO1
Shared with GPIO2
Shared with GPIO3
I/O 3.3V
Shared with GPIO5
I/O 3.3V
Shared with GPIO7
I/O 3.3V
I/O 3.3V
Shared with GPIO6
I/O
PU/PD Comment
O 3.3V
I 3.3V
O 3.3V
O 3.3V
O 3.3V
QMX6m12
52/63
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