Interrupt Status Register - Motorola IXP-9120 Reference Manual

Table of Contents

Advertisement

Table 39: Interrupt Mask Register
Bit
3
2
1
0

Interrupt Status Register

Address: C700 000F
Type: Read Only
This register provides Interrupt status of interrupts generated by the PHY. When interrupted,
the NPU can interrogate this register to determine the interrupt-source.
Table 40: Interrupt Status Register
Bit
3
2
1
0
Description
0: PHY Port-3 Interrupt is not masked
1: PHY Port-3 Interrupt is masked
Reset value: 1
0: PHY Port-2 Interrupt is not masked
1: PHY Port-2 Interrupt is masked
Reset value: 1
0: PHY Port-1 Interrupt is not masked
1: PHY Port-1 Interrupt is not active
Reset value: 1
0: PHY Port-0 Interrupt is not masked
1: PHY Port-0 Interrupt is masked
Reset value: 1
Description
0: PHY Port-3 Interrupt is active
1: PHY Port-3 Interrupt is not active
0: PHY Port-2 Interrupt is active
1: PHY Port-2 Interrupt is not active
0: PHY Port-1 Interrupt is active
1: PHY Port-1 Interrupt is not active
0: PHY Port-0 Interrupt is active
1: PHY Port-0 Interrupt is not active
Access
R/W
R/W
R/W
R/W
Access
RO
RO
RO
RO

Advertisement

Table of Contents
loading

This manual is also suitable for:

Cpci-9120

Table of Contents