Block Diagram; The Ixp2400 - Motorola IXP-9120 Reference Manual

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Devices' features and Data Paths

Block Diagram

SO-DIMM
(Up to 512 MB)
QDR II SSRAM
(Up to 16 MB)
LA-1 Mezzanine
SITE
LA1-920/8M
Figure 27: Single Slot Complex Functional Block Diagram

The IXP2400

The IXP/CPCI-9120 is based on the Intel IXP2400 Network Processor (Sausalito).
Half Duplex OC-48 / 2.5 Gbps Network Processor
Integrated Intel XScale Core that operates at frequencies of 400 MHz and 600 MHz.
Eight fully programmable multi-threaded microengines for packet forwarding and traffic
management on a single chip, supporting 5.4 giga-operations per second.
IXP/CPCI-9120
BOOT ROM
IBMU
USER FLASH
Flash
Demultiplexed SlowPort bus
GP
EPLD
SlowPort
Slow Port
DD
R
Ch 0
IXP2400
MSF
Ch 1
PCI
PCI
PrPMC SITE
82546GB
EPLD
RGMII
RGMII
IXF1104
SPI-3
QUAD MAC
RGMII
By Chandan
RGMII
MDI
MUX
MDI
To PICMG2.16 Links
Block Diagram
MSF MEZZANINE SITE
IO-920/4GBE-T/P
LED
EPLD
88E1145
QUAD PHY
Ununused
DMUX
ports
83

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