Serial Port; Pci Bus; Gigabit Ethernet Controller; Processor Pmc - Motorola IXP-9120 Reference Manual

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Devices' features and Data Paths

CSIX standard is a source-synchronous bus, the IXP2400 uses a common-clocking

scheme for compatibility with the other protocols.

The MSF interface on IXP/CPCI-9120 is connected to a mezzanine card.

Serial Port

The IXP2400 contains a standard RS-232–compatible universal asynchronous receiver/trans-

mitter (UART), which can be used for communication with a debugger or maintenance con-

sole.

Note:Modem controls are not supported.

IXP/CPCI-9120 has a local PCI Bus.

IXP/CPCI-9120 accommodates one 82546GB Dual Port Gigabit Ethernet Controller for Con-

trol plane processing. The 82546GB provides two PICMG 2.16 links on a Packet Switching

Backplane (PSB).

The IXP/CPCI-9120 provides one VITA 32–compliant Processor PMC site on to which addi-

tional I/O or processing power may be added. This site is connected to the IXP2400 via the

local PCI bus.

Processor PMCs when mounted on this site may be configured in monarch or non-monarch

mode. When configured as the monarch, the Processor PMC provides enumeration for the PCI

bus.

Note: The PMC site on IXP/CPCI-9120 shall support 3V-only PrPMCs.

3.3 V key shall be mounted to prevent inadvertent installation of a non-compliant PMC.

Note: The total power consumption (from +12V, -12V, +3.3V and +5V) of the PMC

must not exceed 35 Watts. The power consumption from 5 V and 3.3 V shall not exceed

17.5 Watts and 18 W respectively.

IXP/CPCI-9120

Block Diagram

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