Interrupt Mask Register-2 - Motorola IXP-9120 Reference Manual

Maps and Registers
Table 28: Interrupt Mask Register-1
Bit
2
1
0

Interrupt Mask Register-2

Address: C700 0009
Type: R/W
Interrupts can be masked through the Interrupt mask registers. All interrupts are masked on re-
set/power-on.
Table 29: Interrupt Mask Register-2
Bit
7
6
5
4
3
2
IXP/CPCI-9120
Description
0: IPMI Interrupt-0 is not masked
1: IPMI Interrupt-0 is masked
Reset value: 1
0: 82546 Interrupt-B is not masked
1: 82546 Interrupt-B is masked
Reset value: 1
0: 82546 Interrupt-A is not masked
1: 82546 Interrupt-A is masked
Reset value: 1
Description
0: PMC Interrupt-D is not masked
1: PMC Interrupt-D is masked
Reset value: 1
0: PMC Interrupt-C is not masked
1: PMC Interrupt-C is masked
0: PMC Interrupt-B is not masked
1: PMC Interrupt-B is masked
0: PMC Interrupt-A is not masked
1: PMC Interrupt-A is masked
0: RFU
1: RFU
0: RFU
1: RFU
Register Details
Access
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
R/W
R/W
109