A/D Data And Channel From Fifo - Base + 17/18H (Pcm-3718Ho Only) - Advantech PCM-3718 Series User Manual

4.12 A/D data and channel from FIFO - BASE + 17/18H
(PCM-3718HO only)
The PCM-3718 cards store data from A/D conversions in a 1 K word
First-In-First-Out (FIFO) data buffer. Registers at BASE+17H and
BASE+18H store the channel number and data. The register at
BASE+19H clears the FIFO buffer and sets its empty flag (EF).
Table 4.4: Register for A/D Data and Channel from FIFO
Read
Bit#
BASE+17H
BASE+18H
AD11 ~ AD0
C3 ~ C0
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A/D data and channels from FIFO
7 6 5
AD3 AD2 AD1
AD11 AD10 AD9
Analog to digital data
AD0 the least significant bit (LSB) of the A/D data
AD11 the most significant bit (MSB)
A/D channel number from which the data is derived
C0 the least significant bit (LSB) of the channels
C3 the most significant bit (MSB)
41
4 3 2
AD0 C3 C2
AD8 AD7 AD6
1 0
C1 C0
AD5 AD4
Chapter 4