Dma Channel And Timer Clock Selection (Jp1); Channel Configuration, S. E. Or Diff. (Jp2) - Advantech PCM-3718 Series User Manual

2.2.2 DMA Channel and Timer Clock Selection (JP1)

The PCM-3718 cards support DMA data transfer. The bottom pins of JP1
provide selection of DMA channel 1 or 3, as shown in the following fig-
ure.
The upper three pins of JP1 control the input clock frequency for the 8254
programmable clock/timer of the module.
You have two choices: 10 MHz or 1 MHz. This lets you generate pacer
output frequencies from 2.5 MHz to 0.00023 Hz (71 minutes/pulse).
The following equation gives the pacer rate:
Pacer rate = Fclk / ( Div1 * Div2 )
(Fclk, 1 MHz or 10 MHz, is set by JP1 as illustrated below. Div1 and
Div2 are dividers set in counter 1 and counter 2 in the Intel 8254 counter.
See page 51 for more information on the counter/timer applications).

2.2.3 Channel Configuration, S. E. or diff. (JP2)

The PCM-3718 cards offer 16 single-ended or eight differential analog
input channels. Jumper JP2 sets the analog input channels as 16 single-
ended or 8 differential inputs as shown below:
16 S.E. inputs
S/E
PCM-3718 Series User Manual
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Channel1
1M 10M
DMA1 DMA3
10 MHz
1M 10M
DMA1 DMA3
Eight differential inputs (default)
DIFF
Channel3 (default)
1M
DMA1
1 MHz (default)
1M
DMA1
S/E DIFF
14
10M
DMA3
10M
DMA3