Methods To Compensate For Load-Line Effect; How Llec Adjusts Pulse Output To The Target Levels - Keithley 4200A-SCS User Manual

Section 2: Connections
The basic pulse output system is a series circuit that consists of the pulse generator resistance (fixed
at 50 Ω), interconnect (cabling and pin-to-pad) resistance, and the resistance of the DUT. In this
series circuit, the sum of the voltage drops across these components is equal to the output voltage of
the pulse generator. Therefore, if the resistance of the DUT changes, the voltage seen at the DUT
also changes. This effect is called the load-line effect. See
across DUT
For example, consider a PMU set to output voltage to a 50 Ω load (DUT). For this default setting, the
pulse card outputs twice the programmed pulse voltage. If the interconnect resistance is negligible
(0 Ω), half the pulse card voltage appears across the internal pulse card resistance (50 Ω) and the
other half (which is the programmed pulse voltage) appears across the 50 Ω DUT. For example, if the
pulse card is programmed to output a 5 V pulse, the pulse card sources a 10 V pulse. Five volts will
drop across the internal 50 Ω pulse card resistance and 5 V will appear at the 50 Ω DUT.
Descriptions of the LPT functions discussed in the following topics are provided in Model 4200A-SCS
LPT Library Programming.

Methods to compensate for load-line effect

The methods to compensate for load-line effect include:
•
Use the built-in load-line effect compensation (LLEC) in the PMU for the standard 2-level pulse
mode. Ideally (when LLEC is enabled), the PMU adjusts its output levels such that the
programmed output voltage appears at the DUT. For ITMs, see
(on page 2-21). For UTMs, use the pulse_meas_sm function to control LLEC. Refer to Model
4200A-SCS Parameter Analyzer LPT Library Programming for more information.
•
Manual adjustment of the PMU output until the target pulse level is measured across the DUT.
For a pulse sweep, this manual process must be repeated for every step in the sweep.
If you are not using LLEC, you can manually set the output impedance to match the impedance of the
DUT. For example, if the impedance of the DUT is 1 kΩ, set the output impedance to 1 kΩ. Maximum
power transfer is achieved when the DUT impedance matches the output impedance setting. In a real
test environment, you may not know the exact resistance value of the DUT, and you will have the
added affect of cabling and pin-to-pad resistance. The output impedance can be set from an ITM (see
Disable LLEC and set the output impedance
function in Model 4200A-SCS Parameter Analyzer LPT Library Programming for more information).

How LLEC adjusts pulse output to the target levels

LLEC is an algorithm that adjusts the output of a PMU channel. When enabled, the algorithm
performs a set number of iterations in an attempt to output the target voltage to the DUT.
2-22
(on page 4-15) for details on how the resistance of the DUT affects the voltage across it.
Model 4200A-SCS Pulse Card (PGU and PMU) User's Manual
DUT resistance determines pulse voltage
Load-line effect compensation
(on page 2-28)) or from a UTM (see pulse_load
4200A-PMU-900-01 Rev. A December 2020