Motorola MTR2000 T5544 Instruction / Field Service Manual page 158

VHF Receiver Module
Receiver Front End Circuitry
Custom Receiver IC Circuitry
Note
4
The receiver RF input is fed from the antenna to the receiver module (or a
5-pole external preselector filter, if specified, which provides highly selec-
tive bandpass filtering). The signal is low-pass filtered, routed through a
varactor-tuned preselector (if specified), amplified, image filtered, and fed
to one input of the first mixer. The signal is mixed with the first LO injec-
tion signal (generated by the synthesizer/VCO circuitry) to produce a
44.85 MHz first i-f signal.
The first i-f signal is 2-pole bandpass filtered and fed to a FET amplifier.
The amplifier gain is controlled by AGC properties inherent in the ampli-
fier design. The amplified first i-f signal is then 4-pole bandpass filtered
and fed to the RF input of the custom receiver IC.
The custom receiver IC provides additional amplification, filtering, a sec-
ond down conversion, and finally analog-to-digital conversion of the sec-
ond i-f signal. The digital receive signal is then sent via differential drive
circuitry to the Station Control Module. The data signal contains the nec-
essary I and Q quadrature information, AGC information, and other data
transfer information required by the Station Control Module to process the
receive signal.
The recovered audio signal is in digital format throughout the station cir-
cuitry, resulting in a more noise-free, linear receiver. Analog audio is
present only in the external speaker driver circuitry on the Station Control
Module and on the Wireline Interface Board at the phone line connection
to and from the station.
The remainder of the custom receiver IC circuitry consists of timing and
tank circuits to support the internal oscillator, second LO synthesizer cir-
cuitry, and second i-f circuitry.
A serial bus allows data communications between the custom receiver IC
and a Digital Signal Processor (DSP) located on the Station Control Mod-
ule (via a DSP ASIC device). This bus allows the DSP to control various
current and gain settings, establish the data bus clock rate, program the
second LO, and perform other control functions.
68P81096E19-B
09/30/05