Memory Fast-Read Timing - Infineon Cypress WICED CYW43903 Manual

17.1.3 Memory Fast-Read Timing

Figure 15 shows the SPI flash extended and quad memory fast-read timing.
Note: Regarding Figure 15:
1. 24-bit addressing is used, so A[MAX] = A[23] and A[MIN] = A[0].
2. For an extended SPI protocol, C
3. For a quad SPI protocol, C = 1 + (A[MAX] + 1)/4.
x
Extended
0 7
C
LSB
DQ0 Command
MSB
DQ1
Quad
0 1
C
LSB
DQ[3:0] Command
MSB
Document Number: 002-14826 Rev. *G
PRELIMINARY
= 7 + (A[MAX] + 1).
x
Figure 15. Memory Fast-Read Timing
8 C
x
A[MIN]
A[MAX]
Dummy Cycles
2 C
x
A[MIN]
A[MAX]
Dummy Cycles
D D D D
OUT OUT OUT OUT
MSB
LSB
D D D
OUT OUT OUT
MSB
CYW43903
D D D D
OUT OUT OUT OUT
Don't care
LSB
D
OUT
Page 57 of 65