Table Of Contents - Infineon Cypress WICED CYW43903 Manual

Contents
1. Overview ............................................................ 5
1.1 Introduction ......................................................... 5
1.1.1 Features .................................................. 6
1.2 Standards Compliance ........................................ 7
2. Power Supplies and Power Management ....... 8
2.1 Power Supply Topology ...................................... 8
2.2 CYW43903 Power Management Unit Features .. 8
2.3 Power Management .......................................... 11
2.4 PMU Sequencing .............................................. 11
2.5 Power-Off Shutdown ......................................... 12
2.6 Power-Up/Power-Down/Reset Circuits ............. 12
3. Frequency References ................................... 13
3.1 Crystal Interface and Clock Generation ............ 13
3.2 External Frequency Reference ......................... 14
3.3 External 32.768 kHz Low-Power Oscillator ....... 15
4. Applications Subsystem ................................ 16
4.1 Overview ........................................................... 16
4.2 Applications CPU and Memory Subsystem ...... 16
4.3 Memory-to-Memory DMA Core ......................... 16
4.4 Cryptography Core ............................................ 16
5. Applications Subsystem External Interfaces 17
5.1 GPIO ................................................................. 17
5.2 Cypress Serial Control ...................................... 17
5.3 JTAG and ARM Serial Wire Debug ................... 17
5.4 PWM ................................................................. 18
5.5 SPI Flash ........................................................... 18
5.6 UART ................................................................ 18
5.7 SPI .................................................................... 19
6. Global Functions............................................. 20
6.1 External Coexistence Interface ......................... 20
6.2 One-Time Programmable Memory .................... 20
6.3 Hibernation Block .............................................. 20
6.4 System Boot Sequence ..................................... 21
7. Wireless LAN Subsystem............................... 22
7.1 WLAN CPU and Memory Subsystem ............... 22
7.2 IEEE 802.11n MAC ........................................... 22
7.2.1 PSM ....................................................... 23
7.2.2 WEP ...................................................... 23
7.2.3 TXE ........................................................ 23
7.2.4 RXE ....................................................... 24
7.2.5 IFS ......................................................... 24
7.2.6 TSF ........................................................ 24
7.2.7 NAV ....................................................... 24
Document Number: 002-14826 Rev. *G
PRELIMINARY
7.3 IEEE 802.11
8. WLAN Radio Subsystem ............................... 26
8.1 Receiver Path .....................................................26
8.2 Transmit Path .....................................................26
8.3 Calibration ..........................................................26
9. Pinout and Signal Descriptions..................... 27
9.1 Ball Map .............................................................27
9.2 Ball List ...............................................................28
9.3 Signal Descriptions ............................................30
10. GPIO Signals and Strapping Options ........... 34
10.1 Overview ............................................................34
10.2 Weak Pull-Down and Pull-Up Resistances ........34
10.3 Strapping Options ..............................................34
10.4 Alternate GPIO Signal Functions .......................35
11. Pin Multiplexing .............................................. 36
12. I/O States ......................................................... 38
13. Electrical Characteristics............................... 40
13.1 Absolute Maximum Ratings ...............................40
13.2 Environmental Ratings .......................................41
13.3 Electrostatic Discharge Specifications ...............41
13.4 Recommended Operating Conditions and DC
13.5 Power Supply Segments ....................................43
13.6 GPIO, UART, and JTAG Interfaces DC
14. WLAN RF Specifications................................ 44
14.1 Introduction ........................................................44
14.2 2.4 GHz Band General RF Specifications ..........44
14.3 WLAN 2.4 GHz Receiver Performance
14.4 WLAN 2.4 GHz Transmitter Performance
14.5 General Spurious Emissions Specifications .......48
15. Internal Regulator Electrical Specifications. 49
15.1 Core Buck Switching Regulator .........................49
15.2 3.3V LDO (LDO3P3) ..........................................50
15.3 CLDO .................................................................51
15.4 LNLDO ...............................................................52
7.2.8 MAC-PHY Interface ................................24
™
b/g/n PHY ...................................25
Characteristics ...................................................41
Characteristics ...................................................43
Specifications .....................................................45
Specifications .....................................................47
14.5.1 Transmitter Spurious Emissions
Specifications .........................................48
14.5.2 Receiver Spurious Emissions
Specifications .........................................48
CYW43903
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