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15.2 3.3V LDO (LDO3P3)
Table 26. LDO3P3 Specifications
Specification
Input supply voltage, V
in
Output current
Nominal output voltage, V
Dropout voltage
Output voltage DC accuracy
Quiescent current
Line regulation
Load regulation
PSRR
LDO turn-on time
External output capacitor, C
External input capacitor
1. The maximum continuous voltage is 4.8V. Voltages up to 6.0V for up to 10 seconds, cumulative duration, over the lifetime of the device are allowed. Voltages as
high as 5.0V for up to 250 seconds, cumulative duration, over the lifetime of the device are allowed.
2. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and aging.
Document Number: 002-14826 Rev. *G
PRELIMINARY
Min. = V
+ 0.2V = 3.5V dropout voltage requirement
o
must be met under maximum load for performance
specifications.
–
Default = 3.3V.
o
At max. load.
Includes line/load regulation.
No load.
V
from (V
+ 0.2V) to 4.8V, max. load.
in
o
Load from 1 mA to 450 mA.
V
≥ V
+ 0.2V, V
in
o
100 Hz to 100 kHz.
Chip already powered up.
Ceramic, X5R, 0402,(ESR: 5 mΩ–240 mΩ), ± 10%,
o
10V.
For LDO_VDDBAT5V pin (shared with band gap)
ceramic, X5R, 0402, (ESR: 30mΩ–200 mΩ), ± 10%,
10V.
Not needed if sharing 4.7 µF VBAT capacitor with
SR_VDDBAT5V.
Notes
= 3.3V, C
= 4.7 µF, Max load,
o
o
CYW43903
Min.
Typ.
Max.
1
3.0
3.6
4.8
0.001
–
450
–
3.3
–
–
–
200
–5
–
+5
–
–
85
–
–
3.5
–
–
0.3
20
–
–
–
160
250
4.7
10
2
1.0
–
4.7
–
Page 50 of 65
Units
V
mA
V
mV
%
µA
mV/V
mV/mA
dB
µs
µF
µF
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