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7. Wireless LAN Subsystem
7.1 WLAN CPU and Memory Subsystem
The CYW43903 WLAN section includes an integrated 32-bit ARM Cortex-R4 processor with internal RAM and ROM. The ARM Cortex-
R4 is a low-power processor that features a low gate count, a small interrupt latency, and low-cost debug capabilities. It is intended
for deeply embedded applications that require fast interrupt response features. Delivering more than a 30% performance gain over
ARM7TDMI, the ARM Cortex-R4 implements the ARM v7-R architecture with support for the Thumb-2 instruction set.
At 0.19 µW/MHz, the Cortex-R4 is the most power efficient general-purpose microprocessor available, outperforming 8- and 16-bit
devices on MIPS/µW. It also supports integrated sleep modes.
On-chip memory for this CPU includes 576 KB of SRAM and 448 KB of ROM.
7.2 IEEE 802.11n MAC
The CYW43903 WLAN media access controller (MAC) is designed to support high-throughput operation with low power consumption.
It does so without compromising the Bluetooth coexistence policies, thereby enabling optimal performance over both networks. In
addition, several power-saving modes have been implemented that allow the MAC to consume very little power while maintaining
network-wide timing synchronization. The architecture diagram of the MAC is shown in
The following sections provide an overview of the important MAC modules.
PM Q
IFS
Backoff, BTCX
TSF
NAV
EXT‐ IHR
The CYW43903 WLAN MAC supports features specified in the IEEE 802.11 base standard and amended by IEEE 802.11n. The key
MAC features include:
Transmission and reception of aggregated MPDUs (A-MPDU) for high throughput (HT).
■
Support for power management schemes, including WMM power-save, power-save multi-poll (PSMP), and multiphase PSMP
■
operation.
Support for immediate ACK and Block-ACK policies.
■
Interframe space timing support, including RIFS.
■
Document Number: 002-14826 Rev. *G
PRELIMINARY
Figure 8. WLAN MAC Architecture
Em bedded CPU Interface
Host Registers, DM A Engines
TX‐FIFO
32 KB
W EP
TKIP, AES, W API
IHR
BUS
TXE
TX A‐M PDU
M AC‐PHY Interface
Figure
RX‐FIFO
PSM
10 KB
SHM
BUS
Shared M em ory
RXE
RX A‐M PDU
CYW43903
8.
PSM
UCODE
M em ory
6 KB
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