Evaluation Board Hardware; Power Supplies; Serial Communication; Adfs5758 Reference - Analog Devices EVAL-ADFS5758SDZ User Manual

EVAL-ADFS5758SDZ

EVALUATION BOARD HARDWARE

POWER SUPPLIES

The EVAL-ADFS5758SDZ evaluation board contains the
ADP1031-1 power management unit (PMU), which generates
three of four power supply inputs required by the ADFS5758:
AV (+26.7 V), AV (+5.15 V), and AV
DD1 DD2
V is the fourth power supply required by the ADFS5758.
LOGIC
The JP11 link provides the 3.3 V supply to the V
the V output of the ADFS5758. The AV
LDO
connected to the AV input via the JP12 link if the V
DD1
supply from the ADP1031-1
options and the default link positions.
The EVAL-ADFS5758SDZ evaluation board operates with a
power supply range from −33 V on AV
with a maximum voltage of 60 V between the two rails. AV
requires a voltage between 5 V and 33 V. The V
ADFS5758 can be driven by AV
bypasses the dc-to-dc circuitry.

SERIAL COMMUNICATION

The SDP-S system demonstration platform handles commu-
nication to the EVAL-ADFS5758SDZ via the PC. By default, the
SDP-S board handles the serial port interface (SPI) commu-
nication, controls the RESET and LDAC pins, and monitors the
FAULT pin of the ADFS5758.
Table 1. EVAL-ADFS5758SDZ Link Option Functions
Link Default Link Position
JP1 B
JP2 Inserted
JP3 A
JP4 A
JP5 A
JP6 Not inserted
JP7 A
JP8 A
JP9 Not inserted
JP10 B
JP11 Inserted
JP12 A
JP13 Inserted
P10 Inserted
S2 Left
Middle (default)
Right
User Guide
(−15.4 V) device.
SS
input via
LOGIC
input can be
DD2
OUT2
is not in use. See Table 1 for link
to +33 V on AV
SS
pin of the
DPC+
via the JP6 link. The JP6 link
DD1
Function
Position A connects the AV
Position B selects the V
OUT3
Connects the V pin of the
LOGIC
Position A selects the 3.3 V output from the
Position B selects the 3.3 V input via the EXT+3.3V_ header to the MVDD pin of the ADP1031-1.
Position A connects the LDAC pin to GND. Position B connects the LDAC pin to the V
Position A selects V of the
OUT2
Position B selects the V
LDO
Shorts the V pin to the AV
DPC+
Position A connects the AD0 pin to ground. Position B connects the AD0 pin to the V
Position A connects the AD1 pin to ground. Position B connects the AD1 pin to the V
Connects the return signal to ground.
Position A selects the REFOUT pin of the
Position B selects the ADR4525
Connects the 3.3 V output of the V
Position A selects V of the
OUT2
Position B selects the AVDD1 pin as the input voltage to the AVDD2 pin.
Connects V of the ADP1031-1
OUT1
Provides options to disconnect from the
See Table 2 for the specific link options.
In the left position, this link connects the RESET pin to the V
In the middle position (default), this link controls the RESET pin via the
In the right position, this link connects the RESET pin to ground.
The EVAL-ADFS5758SDZ evaluation board can disconnect
from the SDP-S
external source by removing the appropriate links on the P10
link. The option to tie the RESET and LDAC pins to high or low
levels can be accessed through the S2 switch and JP4 link.
ADFS5758
The ADFS5758
reference. The external reference on board is the
is powered by either the AV
the V generated by the ADFS5758. JP5 selects which voltage
LDO
reference is to be used by the ADFS5758.
ADFS5758
,
DD1
The ADFS5758
DD2
conjunction with the
frame to determine which
by the system controller. AD0 and AD1 can be configured
through JP7 and JP8.
ADP1031-1
PWRGD is an active high signal that indicates when the
ADP1031-1
The DS1 light emitting diode (LED) lights up when the power-
good signal is low, indicating an error on the
voltage outputs.
pin to ground for the unipolar supply option (current output only).
SS
voltage of the ADP1031-1.
ADFS5758 to the SVDD1 pin of the ADP1031-1.
SDP-S to the MVDD pin of the ADP1031-1.
ADP1031-1 as the input voltage to the ADR4525.
pin as the input voltage to the ADR4525.
pin, bypassing the positive dc-to-dc circuitry.
DD1
ADFS5758 as the input to the REFIN pin of the ADFS5758.
output as the input to the REFIN pin.
pin to the V pin.
LDO LOGIC
ADP1031-1 as the input voltage to the AV
to the AV pin.
DD1
SDP-S board and to drive digital signals from an external source.
Rev. 0 | Page 3 of 20
board and drive the digital signals from an
REFERENCE
can use its internal reference or an external
generated from
DD2
ADDRESS PINS
address pins (AD0 and AD1) are used in
ADFS5758 address bits within the SPI
ADFS5758 device is being addressed
POWER GOOD
outputs have reached the desired output voltage.
LOGIC
pin.
DD2
pin.
LOGIC
SDP-S board.
UG-1688
ADR4525 and
ADP1031-1 or
ADP1031-1
pin.
pin.
LOGIC
pin.
LOGIC