Figure 2-1. Vxi-Mxi Block Diagram - National Instruments VXI-MXI User Manual

General Description
SYSFAIL*
SYSRESET*
ACFAIL*
VMEbus IRQ7-1
VMEbus
Address and
AM5-0
Address
Modifiers
A31-1
Transceivers
VXIbus
System
Controller
Functions
VMEbus
D31-0 Data
Transceivers
VMEbus
Control Signals
Transceivers
VMEbus
Requester and
Arbiter Circuitry
TTL Trigger Lines 7-0
ECL Trigger Lines 1-0
CLK10
VXI-MXI User Manual
Daughter Card Connection
SYSFAIL, ACFAIL,
SYSRESET Logic
Parity
Check and
Generation
A32
Window
A24
Window
A16
Window
LA
Window
VXI-MXI
Configuration
Registers
MXIbus
Master Mode
State
Machine
MXIbus
Slave Mode
State
Machine
TTL and ECL
Trigger Lines
and
CLK10 Circuitry

Figure 2-1. VXI-MXI Block Diagram

2-6
IRQ7-1
IRQ*
Interrupt
Circuitry
PAR
MXIbus
Address/Dat AM4-0
a and
Address
AD31-0
Modifiers
Transceivers
MXIbus
System
Controller
Functions
MXIbus
Control Signals
Transceivers
MXIbus
Requester and
Arbiter Circuitry
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Chapter 2
TRG OUT
TRG IN
EXT CLK
Front
Panel
SMBs