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Glossary
N
Nonprivileged
Access
Non-Slot 0 Device
Normal Operating
Mode
P
P1
P2
Parity
PC
PRI
Privileged Access
Propagation
R
Read
Register-Based
Device
VXI-MXI User Manual
One of the defined types of VMEbus data transfers; indicated by certain
address modifier codes. Each of the defined VMEbus address spaces has a
defined nonprivileged access mode.
A device configured for installation in any slot in a VXIbus
mainframe other than Slot 0. Installing such a device into Slot 0 can
damage the device, the VXIbus backplane, or both. The VXI-MXI
can be configured as either a Slot 0 device or a Non-Slot 0 device.
Contrasted with Interlocked Arbitration Mode; in this mode there can be
masters operating simultaneously in the VXIbus/MXIbus system.
Vulnerable to deadlock situations.
The minimum connector required for a VMEbus system. It includes 24
address lines, 16 data lines, and all control, arbitration, and interrupt
signals.
A second VMEbus connector providing 32 bits of address and data. In
VXI, the P2 connector adds trigger, MODID, and CLK10 signals.
Ensures that there is always either an even number or an odd number of
asserted bits in a byte, character, or word, according to the logic of the
system. If a bit should be lost in data transmission, its loss can be detected
by checking the parity.
Personal Computer
Priority
See Supervisory Access.
The transmission of signals through a computer system.
To get information from any input device or file storage media.
A Servant-only device that supports VXIbus configuration registers.
Register-Based devices are typically controlled by Message-Based devices
via device-dependent register reads and writes. The VXI-MXI is a
Register-Based device.
Glossary-8
© National Instruments Corporation
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