Memory Map
interconnect (SPI) flash, parallel flash, and eMMC. See
more information about a specific memory type, go to the respective sec-
tion in this chapter.
Table 1-1. EZ-Board Internal Memory Map
Start Address
0xEF00 0000
0xEF00 8000
0xFF80 0000
0xFF80 4000
0xFF80 8000
0xFF90 0000
0xFF90 4000
0xFF90 8000
0xFFA0 0000
0xFFA0 4000
0xFFA0 8000
0xFFA1 0000
0xFFA1 4000
0xFFB0 0000
0xFFB0 1000
0xFFC0 0000
0xFFE0 0000
Table 1-2. EZ-Board External Memory Map
Start Address
0x0000 0000
0x0800 0000
0x2000 0000
1-14
Content
BOOT ROM (32K BYTE)
Reserved
DATA BANKA SRAM (16K BYTE)
DATA BANKA SRAM/CACHE (16K BYTE)
Reserved
DATA BANKB SRAM (16K BYTE)
DATA BANKB SRAM/CACHE (16K BYTE)
Reserved
INSTRUCTION BANK A SRAM (16K BYTE)
INSTRUCTION BANK B SRAM (16K BYTES)
Reserved
INSTRUCTION BANK C SRAM/CACHE (16K BYTE)
Reserved
SCRATCHPAD SRAM (4K BYTE)
Reserved
SYSTEM MMR REGISTERS
CORE MMR REGISTERS
End Address
0x03FF FFFF
0x1FFF FFFF
0x200F FFFF
ADSP-BF518F EZ-Board Evaluation System Manual
Table
Content
SDRAM (SDRAM)
Reserved
ASYNC memory bank 0 (flash)
1-2. For
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