Codan NGT 2010 RF Technical & Service Manual page 119

The battery voltage is monitored by V5. When the supply voltage (A rail) drops to
approximately 12 V, the voltage at the base of V5 falls and causes V5 to conduct. This
changes the threshold of the forward power ALC detector. The ALC detector then starts
to reduce the output power and since the control is linear, a further reduction in supply
voltage continues to lower the output power.
If the heatsink temperature exceeds 80°C (176°F), the PTC resistor R262 rapidly
increases its resistance. This causes V13 to conduct and thus reduces the reference
voltage (R19 pin 1). This lowers the output power and prevents the heatsink temperature
from exceeding 100°C (212°F).
The relay protection circuit is formed by IC5/B and associated components. It
simultaneously monitors the output FET, drain swing of the output FET and forward
detector output of D1. If a relay failure results in no signal at the antenna output, the
output of IC5/B goes high. This lowers the gain of the input amplifiers V200 and V201
and thus reduces the drive to the output FETs to a safe level.
The ALCs control the output from the summing amplifier IC5/A. This output passes to
IC201/B, which inverts the direction of the control signal to drive the variable resistor
FETs V202 and V203 in the gain stage (see
Drawing 04-03369, or
ALTERNATIVE TEXT
Drawing
All the ALC inputs (except relay detection) are applied to V7 to V10. The ORed output
is connected via R50 and D14 to the positive input pin of the ALC level comparator
IC5/A pin 3. The reference voltage connected to pin 2 is firmware controlled by the
microprocessor IC2.
The microprocessor IC2 and R19 are used as a 5-bit DAC with an output range of 5 to
2.5 V. The output from R19 is buffered by IC6/B and then divided and filtered by R55,
R56 and C151. The output is then buffered again by IC6/A and used as the reference
voltage for IC5/A and IC201/B. This allows the microprocessor IC2 to reduce the PA
output at the higher operating frequencies and ensures that the intermodulation distortion
remains within specified limits.
The output voltage of the RF bridge formed by T1 and associated components is rectified
by D1 for the forward power and by D2 for the reflected power.
The output of the forward rectifier D1 is applied via R37 to the input of V7. The sum of
the resistors between the base of V7 and ground form a resistor divider network. This
determines the nominal PEP output level when matched to a 50 Ω load.
For high power, the resistors R34 and R35 are shorted out when +5 V is applied to the
gate of the FET switch V6 and do not contribute to the chain. The nominal high-power
output, which is measured at low frequency, is set by R32 (SET HI PWR). V17 switches
between 100 W and 125 W.
NOTE
For low power, V6 is off, so R34 and R35 are added to the divider. R35 (LOW PWR)
sets the power to 12 W PEP.
NGT Transceiver System Technical Service Manual
04-03542
Fitting link X2 toggles the power setting from 125 to 100 W or from 100
to 125 W.
NGT—Technical description (2010)
page 81, Gain control stage).
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