Table 29 System Controller Mpp Configuration - Motorola PPC/CPCI-690 Reference Manual

Maps and Registers
PPC/CPCI-690
Table 28: MPP and GPP Register Settings
Register
MPP Control 2
MPP Control 3
GPP I/O Control
GPP Level Control
The following table gives an overview on the MPP configuration for the
board.
Table 29: System Controller MPP Configuration
MPP Function
[31] GPP[31]
[30] GPP[30]
[29] GPP[29]
[28] GPP[28]
[27] GPP[27]
[26] GPP[26]
[25] GPP[25]
[24] GPP[24]
[23] GPP[23]
[22] GPP[22]
[21] GPP[21]
[20] GPP[20]
[19] GPP[19]
[18] GPP[18]
[17] GPP[17]
[16] GPP[16]
[15] GPP[15]
[14] GPP[14]
[13] INT#[1]
[12] INT#[0]
[11] WDE#
[10] WDNMI#
[9] REQ0[4]#
Address
F100F008
16
F100F00C
16
F100F100
16
F100F110
16
Description
PCI bus 1 interrupts
PCI bus 0 interrupts
Watchdog interrupt (in)
Reserved
IPMI interrupts
Ejector interrupt
CompactPCI interrupt DEG#
CompactPCI interrupt FAL#
Reserved
Reserved
PowerPC interrupt SMI#
PowerPC interrupt MCP#
Watchdog expired reset
Watchdog interrupt
PCI bus 0 REQ#
Interrupt Map
Data
00000000
16
00000000
16
00000000
16
FFC7C000
16
Direction Polarity
Input Active low
Input Active low
Input Active low
Input Active low
Input Active high
Input Active low
Input Active low
Input Active low
Input Active low
Input Active low
Output Active low
Output Active low
Output Active low
Output Active low
Input Active low
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