Texas Instruments TMS320C6000 Programmer's Manual page 84

Table 3–6. TMS320C6000 C/C++ Compiler Intrinsics (Continued)
C Compiler Intrinsic
float _itof(uint);
double & _memd8(void * ptr);
int & _mem4(void * ptr);
double _ldotp2 (int src1 , int src2 );
int _dotp2 (int src1 , int src2 );
uint _lmbd(uint s rc1, uint src2 );
uint _lo(double);
int _max2 (int src1 , int src2 );
int _min2 (int src1 , int src2 );
unsigned _maxu4 (uint src1 , uint src2 );
unsigned _minu4 (uint src1 , uint src2 );
double _mpy2 (int src1 , int src2 );
double _mpyhi (int src1 , int src2 );
double _mpyli (int src1 , int src2 );
int _mpyhir (int src1 , int src2 );
int_mpylir (int src1 , int src2 );
double _mpysu4 (int src1 , uint src2 );
double _mpyu4 (uint src1 , uint src2 );
Note: Instructions not specified with a device apply to all 'C6000 devices.
Assembly
Description
Instruction
Reinterprets the bits in the unsigned inte-
ger as a float.
(Ex: _itof(0x3f800000) == 1.0)
LDNDW/ Allows unaligned loads and stores of 8 by-
STNDW tes to memory.
LDNW/ Allows unaligned loads and stores of 4 by-
STNW tes to memory.
LDOTP2 The product of the lower signed 16–bit val-
DOTP2 ues in src1 and src2 are added to the prod-
uct of the upper signed 16–bit values in
src1 and src2. In the ldotp2 vecsum, the
result is sign extended to 64 bits.
LMBD Searches for a leftmost 1 or 0 of src2 deter-
mined by the LSB of src1. Returns the
number of bits up to the bit change.
Returns the low (even) register of a double
register pair as an integer.
MAX2 Places the larger/smaller of each pair of
MIN2 values in the corresponding position in the
MAXU4 return value. Values can be 16–bit signed
MINU4 or 8–bit unsigned.
MPY2 Returns the products of the lower and
higher 16–bit values in src1 and src2.
MPYHI Produces a 16 by 32 multiply. The result is
MPYLI placed into the lower 48 bits of the returned
double. Can use the upper or lower 16 bits
of src1.
MPYHIR Produces a signed 16 by 32 multiply. The
MPYLIR result is shifted right by 15 bits. Can use
the upper or lower 16 bits of src1.
MPYSU4 For each 8–bit quantity in src1 and src2,
MPYU4 performs an 8–bit by 8–bit multiply. The
four 16–bit results are packed into a
double. The results can be signed or un-
signed.
Refining C/C++ Code
Optimizing C/C++ Code
Device
'C64x
'C64x
'C64x
'C64x
'C64x
'C64x
'C64x
'C64x
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