Final Assembly Code For Fir Filter With Redundant Load Elimination - Texas Instruments TMS320C6000 Programmer's Manual

Redundant Load Elimination
Example 6–64. Final Assembly Code for FIR Filter With Redundant Load Elimination
MVK
MVK
|| MVK
OUTLOOP:
LDH
|| ADD
|| ADD
|| ADD
|| MVK
||[A2] SUB
LDH
|| LDH
|| ZERO
|| ZERO
LDH
|| LDH
LDH
|| LDH
[B2] SUB
|| LDH
|| LDH
[B2] B
|| LDH
|| LDH
MPY
||[B2] SUB
|| LDH
|| LDH
MPY
|| MPY
||[B2] B
|| LDH
|| LDH
MPY
|| MPY
||[B2] SUB
|| LDH
|| LDH
6-116
.S1 50,A2
.S1 80,A3
.S2 82,B6
.D1 *A4++[2],A0
.L2X A4,2,B5
.D2 B4,2,B4
.L1X B4,0,A5
.S2 16,B2
.S1 A2,1,A2
.D1 *A5++[2],A1
.D2 *B5++[2],B1
.L1 A9
.L2 B9
.D2 *B4++[2],B0
.D1 *A4++[2],A0
.D1 *A5++[2],A1
.D2 *B5++[2],B1
.S2 B2,1,B2
.D2 *B4++[2],B0
.D1 *A4++[2],A0
.S2 LOOP
.D1 *A5++[2],A1
.D2 *B5++[2],B1
.M1 A0,A1,A7
.S2 B2,1,B2
.D2 *B4++[2],B0
.D1 *A4++[2],A0
.M2 B1,B0,B7
.M1X B1,A1,A8
.S2 LOOP
.D1 *A5++[2],A1
.D2 *B5++[2],B1
.M2X A0,B0,B8
.M1 A0,A1,A7
.S2 B2,1,B2
.D2 *B4++[2],B0
.D1 *A4++[2],A0
; set up outer loop counter
; used to rst x ptr outer loop
; used to rst h ptr outer loop
; x0 = x[j]
; set up pointer to x[j+1]
; set up pointer to h[1]
; set up pointer to h[0]
; set up inner loop counter
; decrement outer loop counter
; h0 = h[i]
; x1 = x[j+i+1]
; zero out sum0
; zero out sum1
; h1 = h[i+1]
; x0 = x[j+i+2]
;* h0 = h[i]
;* x1 = x[j+i+1]
; decrement inner loop counter
;* h1 = h[i+1]
;* x0 = x[j+i+2]
; branch to inner loop
;** h0 = h[i]
;** x1 = x[j+i+1]
; x0 * h0
;* decrement inner loop counter
;** h1 = h[i+1]
;** x0 = x[j+i+2]
; x1 * h1
; x1 * h0
;* branch to inner loop
;*** h0 = h[i]
;*** x1 = x[j+i+1]
; x0 * h1
;* x0 * h0
;** decrement inner loop counter
;*** h1 = h[i+1]
;*** x0 = x[j+i+2]
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