Texas Instruments TMS320C6000 Programmer's Manual page 213

Modulo Scheduling of Multicycle Loops
Example 6–40. Assembly Code for Weighted Vector Sum (Continued)
STH .D2
|| SHR .S2
|| STH .D1
|| SHR .S1
|| AND .L2
||[A1] SUB .L1
|| MPY .M1X
; Branch occurs here
ADD .L2
STH .D2
6-76
B9,*B0++[2] ; store ci+1
B5,15,B7 ;* (m * ai+1) >> 15
A9,*A6++[2] ;* store ci
A5,15,A7 ;** (m * ai) >> 15
B2,B10,B8 ;** bi
A1,1,A1 ;*** decrement loop counter
A2,B6,A5 ;*** m * ai
B7,B1,B9 ; ci+1 = (m * ai+1) >> 15 + bi+1
B9,*B0 ; store ci+1