Avoiding Cross Path Stalls: Partitioned Linear Assembly - Texas Instruments TMS320C6000 Programmer's Manual

Linear Assembly Considerations
Example 8–25. Avoiding Cross Path Stalls: Partitioned Linear Assembly
.global _w_vec
_w_vec: .cproc
.reg
.reg
MVK
MVKH
MVK
ADD
LOOP: .trip 50
LDW .D2
LDW .D1
MPY .M1
MPYHL .M2
SHR .S1
SHR .S2
AND .L2X
SHR .S1
ADD .L2X
ADD .L1X
STH .D2
STH .D1
[cntr]SUB
[cntr]B
.endproc
8-52
a, b, c, m
ai_i1, bi_i1, pi, pi1, pi_i1, pi_s, pi1_s
mask, bi, bi1, ci, ci1, c1, cntr
–1, mask
0, mask ; generate a mask = 0x0000FFFF
50, cntr ; load loop count with 50
2, c, c1 ; c1 is offset by 2(16–bit values)from c
; this loop will run a minimum of 50 times
*a++,ai_i1
*b++,bi_i1
ai_i1, m, pi
ai_i1, m, pi1
pi, 15, pi_s
pi1,15, pi1_s
bi_i1, mask, bi
bi_i1, 16, bi1
pi_s, bi, ci
pi1_s, bi1, ci1
ci, *c++[2]
ci1, *c1++[2]
cntr, 1, cntr
LOOP
In the implementation above, 16–bit values two at a time with the LDW instruc-
tion into a single 32–bit register. Each 16–bit value is multiplied in register ai_i1
by the short (16–bit) constant m. Each 32–bit product is shifted to the right by
15 bits. The second input array is also brought in two 16–bit values at a time
into a single 32–bit register, bi_i1. bi_i1 is ANDed with a mask that zeros the
upper 16–bits of the register to create bi (a single 16–bit value). bi_i1 is also
shifted to the right by 16 bits so that the upper 16–bit input value can be added
to the corresponding weighted input value.
;load 32–bits (an & an+1)
;load 32–bits (bn & bn+1)
;multiply an by a constant ; prod0
;multiply an+1 by a constant; prod1
;shift prod0 right by 15 –> sprod0
;shift prod1 right by 15 –> sprod1
;AND bn & bn+1 w/ mask to isolate bn
;shift bn & bn+1 by 16 to isolate bn+1
;add sprod0 + bn
;add sprod1 + bn+1
;store 16–bits (cn)
;store 16–bits (cn+1)
;decrement loop count
;branch to loop if loop count > 0