Software Pipeline Feedback From Linear Assembly - Texas Instruments TMS320C6000 Programmer's Manual

Lesson 5: Writing Linear Assembly
Example 2–17. Software Pipeline Feedback from Linear Assembly
;*––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop label : LOOP
;* Known Minimum Trip Count
;* Known Max Trip Count Factor
;* Loop Carried Dependency Bound(^) : 3
;* Unpartitioned Resource Bound
;* Partitioned Resource Bound(*)
;* Resource Partition:
;*
;* .L units
;* .S units
;* .D units
;* .M units
;* .X cross paths
;* .T address paths
;* Long read paths
;* Long write paths
;* Logical
;* Addition ops (.LSD)
;* Bound(.L .S .LS)
;* Bound(.L .S .D .LS .LSD)
;*
;* Searching for software pipeline schedule at ...
;* ii = 4
;* done
;*
;* Epilog not entirely removed
;* Collapsed epilog stages
;*
;* Prolog not removed
;* Collapsed prolog stages
;*
;* Minimum required memory pad : 24 bytes
;*
;* Minimum safe trip count
;*
;*––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––*
2-30
The following example shows the software pipeline feedback from
Example 2–16.
A–side
ops (.LS)
Schedule found with 5 iterations in parallel
Notice in Example 2–16 that each instruction is manually partitioned. From the
software pipeline feedback information in Example 2–17, you can see that a
software pipeline schedule is found at ii = 4. This is a result of rewriting the
iircas4 ( ) function in linear assembly, as shown in Example 2–16.
: 10
: 1
: 4
: 4
B–side
0 0
1 0
4* 2
4* 4*
4* 4*
3 3
1 1
0 0
0 2 (.L or .S unit)
5 5 (.L or .S or .D unit)
1 1
4* 3
: 3
: 0
: 2