6.6.6.1 Resource Conflicts
Figure 6–12. Dependency Graph of Weighted Vector Sum (Showing Resource Conflict)
MPY
pi
2
SHR
Scheduled
on cycle 7
pi_scaled
1
ADD
ci
Resources from one instruction cannot conflict with resources from any other
instruction scheduled modulo iteration intervals away. In other words, for a
2-cycle loop, instructions scheduled on cycle n cannot use the same resources
as instructions scheduled on cycles n + 2, n + 4, n + 6, etc. Table 6–13 shows
the addition of the SHR bi+1 instruction. This must avoid a conflict of resources
in cycles 5 and 7, which are one iteration interval away from each other.
Even though LDW bi_i+1 (.D2, cycle 0) finishes on cycle 5, its child, SHR bi+1,
cannot be scheduled on .S2 until cycle 6 because of a resource conflict with
SHR pi+1_scaled, which is on .S2 in cycle 7.
A side
LDW
ai_ai+ 1
5
5
MPYHL
pi+ 1
2
SHR
pi+1_scaled
1
Optimizing Assembly Code via Linear Assembly
Modulo Scheduling of Multicycle Loops
B side
Scheduled
on cycle 5
5
AND
bi
ADD
1
1
ci+1
LDW
bi_bi+1
5
SHR
bi+1
6-65
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