Isbc 546 Functional Description - Intel iSBC 546 Hardware Reference Manual

High performance terminal controllers
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BOARD OPERATION
RAM refresh uses a 1 Mhz output from Timer 1 of the on-board
80186.
A divide by 15 counter causes a refresh request to be sent
to the PAL arbiter every 15 microseconds. An eight bit counter
addresses the RAM.
The serial channels of the controller boards are implemented in
flour 82530 Serial Communication Controller (SCC) chips. The baud
rate clock for the serial channels is generated by the 82530
secs. Each channel has its own two on-chip baud rate generators,
allowing each channel to be programmed separately. Chapter 4 of
this manual describes baud rate programming.
The 82530 SCCs are selected by the PCSl* (Peripheral Chip Select)
through PCS4* outputs of the on-board 80186. The DSR signals from
the RS232 serial connectors are all tied to one input port decoded
by the PCSo* line of the 80186.
2.3
iSBC
546 FUNCTIONAL DESCRIPTION
The iSBC 546 board, Figure 2-2, is similar to both the iSBC 547
and 548 boards. It differs primarily in that it has a line printer
interface connector and associated circuitry, a clock/calendar
circuit and supports only four serial channels.
The iSBC 546 processes data in the same manner as the other two
boards; it has the same on-board RAM and controls it in same way
as the other boards. The serial channels are
controlled in the
same manner as on the iSBC 547/548 boards except only two 82530
SCC devices are used.
The line printer interface is implemented through port A of an
8255A Programmable Peripheral Interfa,ce (PPI operated in strobed
output mode). A PAL device controls timing and the line printer.
Approximately two microseconds after data is written to port A
the PAL generates a LP STB* (Line Printer Strobe) signal to the
printer indicating data to the printer is valid. LP STB* stays
active for one microsecond. When LP ACK (Line Printer
Acknowledge) is returned by the printer it clears the port and
allows more data to be sent.
The 8255A PPI is selected by the PCS3* signal generated by the on-
board 80186. The PPI replaces one of the SCC devices in the I/O
map for the controller boards.
2-4

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