Table of Contents
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Preface
4-3
DIP Switch SW3 for PMC Interface Configuration ..................................... 4 - 4
4-4
JP2 Jumper Setting for RS-422 TXD Termination (COM2) ........................ 4 - 5
4-5
JP3 Jumper Setting for RS-422 RXD Termination (COM2) ....................... 4 - 5
4-6
I/O Address Map ........................................................................................ 4 - 6
4-7
Status Register 0 (STAT0) .......................................................................... 4 - 7
4-8
Status Register 1 (STAT1) .......................................................................... 4 - 8
4-9
Control Register 0 (CTRL0) ....................................................................... 4 - 9
4-10 Control Register 1 (CTRL1) ....................................................................... 4 - 9
4-11 Device Protection Register (DPROT) ....................................................... 4 - 10
4-12 Reset Status Register (RSTAT) ................................................................ 4 - 11
4-13 Board Interrupt Configuration Register (BICFG) ...................................... 4 - 12
4-14 Status Register 2 (STAT2) ........................................................................ 4 - 13
4-15 Board ID High Byte Register (BIDH) ........................................................ 4 - 13
4-16 Board and PLD Revision Register (BREV) .............................................. 4 - 14
4-17 Geographic Addressing Register (GEOAD) ............................................. 4 - 14
4-18 Watchdog Timer Control Register (WTIM) ............................................... 4 - 16
4-19 Board ID Low Byte Register (BIDL) ......................................................... 4 - 17
4-20 Debug LED Configuration Register (DLCFG) .......................................... 4 - 18
4-21 Debug LED Control Register (LCTRL) ..................................................... 4 - 19
4-22 IPMI Controller Status Register 0 (ICSTA0) ............................................. 4 - 20
4-23 IPMI Controller Status Register 1 (ICSTA1) ............................................. 4 - 21
4-24 IPMI Reset Status Register (IRSTA) ........................................................ 4 - 22
5-1
Maximum Input Power Voltage Limits ........................................................ 5 - 3
5-2
DC Operational Input Voltage Ranges ....................................................... 5 - 3
5-3
Input Voltage Characteristics ..................................................................... 5 - 5
5-4
CP6002 in EFI Shell ................................................................................... 5 - 7
5-5
CP6002 with Win. XP and Processor and Graphics in Idle State .............. 5 - 7
5-6
CP6002 with Win. XP and Max. Proc. Workload and Graph. in Idle State.. 5 - 7
5-7
CP6002 with Win. XP and Maximum Processor and Graphics Workload .. 5 - 7
5-8
Power Consumption of CP6002 Accessories ............................................ 5 - 8
5-9
Power Consumption of the Gigabit Ethernet Controller ............................ 5 - 8
5-10 Start-Up Currents of the CP6002 ............................................................... 5 - 8
5-11 PMC/XMC Module Current ........................................................................ 5 - 9
A-1 CP6001-EXT-SATA Main Specifications ................................................... A - 3
Page x
CP6002
ID 1036-6431, Rev. 2.0
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Table of Contents
