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Response Times
12.3
Firmware Execution Times
The execution time of the individual firmware slices depends on
•
the modes in which the channels are operated,
•
the configuring data and
•
the current actual value.
The table below shows the
•
base times which the firmware needs in each cycle to process channel 1 and channel 2.
•
the additional times needed only in the firmware cycle in which the setpoint is reached or in
which an error occurs.
•
the execution time for a data interchange in the relevant mode.
When computing the response time, you must always assume the maximum value for a data inter-
change.
Position decoding mode
Table 12-1. Firmware Execution Times, Position Decoding Mode
Description
Base time without configuring
Base time for position decoding without track comparison
Base time per track comparison without hysteresis
Base time per track comparison with hysteresis
Additional time for entering and exiting a track
Additional time for IP 240 to set or reset an output (per DQ)
Additional time for IP 240 to generate an interrupt
(for each interrupt bit set)
Time for a data exchange
Data Read
Data Write
Example:
Channel 1:
•
Base time without configuring
•
Position decoding modes
•
6 tracks used, without hysteresis
In one FW cycle,
•
a track can be entered,
•
an output set and
the other output reset and
•
an actual value-dependent interrupt generated.
12-4
IP 240
Max. execu-
Abbrev.
tion time
t
45 µs
A
520 µs
t
W
t
160 µs
WS1
t
230 µs
WS2
t
30 µs
WZ1
t
45 µs
WZ2
30 µs
t
WZ3
430 µs
t
kom
t
740 µs
kom
=
45 µs
t
A
=
520 µs
t
W
6 x t
=
960 µs
WS1
=
30 µs
t
WZ1
2 x t
=
90 µs
WZ2
=
30 µs
t
WZ3
----------------
t
= 1675 µs
ka1
EWA 4NEB 811 6120-02a
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