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Simatic S5 IP 240
Siemens Simatic S5 IP 240 Manuals
Manuals and User Guides for Siemens Simatic S5 IP 240. We have
2
Siemens Simatic S5 IP 240 manuals available for free PDF download: Manual, Equipment Manual
Siemens Simatic S5 IP 240 Manual (418 pages)
Counter/Positioning/Position Decoder Module
Brand:
Siemens
| Category:
Control Unit
| Size: 2.4 MB
Table of Contents
Qualified Person
2
Table of Contents
4
Preface
5
Courses
6
Description of Contents
6
Introduction
6
Conventions
8
System Overview
11
Figures
12
Modes of the IP 240 Module
13
System Overview
13
Module Description and Accessories
15
Mechanical Environmental Conditions
17
Specifications on IEC/VDE Safety
17
Climatic Environmental Conditions
17
General Technical Specifications
17
Module Description and Accessories
17
Technical Specifications
18
Position Decoding and Positioning
18
Counting
19
Inputs/Outputs
20
Front Connectors
20
Block Diagram of the Input Circuit
21
Block Diagram of the Output Circuit
22
Leds
23
Encoder Supply
23
Influence of Cable Length on the Encoder Supply Voltage
23
Order Numbers
24
Locations of the Address Switches
27
Addressing
27
Setting the I/O Area or the Extended I/O Area
29
Suitable Programmable Controllers and Expansion Units
32
Permissible Module Slots
32
S5-115U Central Controller
32
Hardware Installation
32
S5-155U Central Controller
33
S5-115U Expansion Unit, er 701-3 Subrack
33
S5-183U Expansion Unit
34
S5-184U Expansion Unit
34
S5-185U Expansion Unit
34
S5-186U Expansion Unit
34
Wiring
35
Connectors
35
Permissible Cross-Sections of Conductors
35
Connector Pin Assignments
36
Front Connector Pin Assignments
36
Pin Assignments for Base Connector X 1
37
Shielding of Cable Connections on the IP 240
37
Four-Wire BERO
38
Installation Examples
38
Three-Wire BERO
38
Inputs
38
Incremental Encoders
39
Connection of Encoders with Symmetrical Output Signals
39
Outputs
43
Connecting the Load to the Digital Outputs on the IP 240
43
Operation
46
Locations of Switchbanks and Fuses
46
Allocation of Coding Switches on Switchbank S2 to the Irx Interrupt Circuits
47
Allocation of Serviceable Interrupt Circuits
47
Settings for Interrupt Generation
47
I/O Byte 0 (PY)
48
Interrupt Generation with I/O Byte 0
48
ABIT Parameter
49
Calling the Interrupt Obs in the S5-150U and S5-155U (150 Mode)
49
Example for Setting the Coding Switches
50
Required Switch Settings on the IP 240
50
Settings of the Coding Switches (Example)
50
Additional Programming in the Organization Blocks for the S5-115U
51
Output Inhibit (BASP)
51
Setting the Command Output Inhibit "BASP" on Switchbank S4
51
Matching to Encoder Signals
52
Setting Switchbank S4 for Symmetrical or Asymmetrical Signals
52
Setting the Encoder Signal Level on Switchbanks S5 and S6
52
Module Functions
55
Modes
55
Position Decoding
55
Functional Description
55
Digital Outputs
56
Interrupt Generation
56
IP 252 Expansion
56
Hardware Fault (Red MF LED)
57
Programming
57
Standard Function Blocks
57
Wirebreak/Short-Circuit (Red WB LED)
57
Configuring Function Blocks
58
Control Function Blocks
58
Data Blocks
58
Cpu Stop
59
Fault and Error Flagging
59
Power on
59
Restart Characteristics
59
Communications Error Codes
60
Error Flagging in the PAFE Byte
60
Hardware Fault Codes
60
Hardware Faults and Communications Errors
60
Parameter and Data Errors
61
Multiprocessor Operation
62
Actual Value
65
Application
65
Formation of the Actual Value
65
Counting Direction
65
Position Decoding
65
Principle of Operation
65
Actual Value and Overrange in Positon Decoding Mode
66
Changing the Counting Direction
66
Reading the Actual Value
66
Zero Offset
66
Fourfold Resolution (AFL=4)
67
Resolution
67
Single Resolution (AFL=1)
67
Twofold Resolution (AFL=2)
67
Final Value of the First Track (END1)
68
Initial Value of the First Track (ANF1)
68
Reference Tracks
68
Sample Traversing Ranges
68
Identification of the Tracks to be Transferred
69
Monitoring the Reference Tracks
69
Transfer by Calling Configuring FB 169
69
Transfer by Calling Control FB 170
69
Setting the Digital Outputs
70
Triggering a Process Interrupt
70
Resetting the Digital Outputs
71
Evaluating the Reference Tracks
72
Setting/Resetting the Outputs
72
Triggering the Interrupt
72
Hysteresis
73
Traversing Speed and Track Width
73
Defining the Hysteresis
74
Influence of the Hysteresis on Interrupt Generation
74
Influence of the Hyteresis on the Outputs
74
Track with Hysteresis
74
Resetting of an Output
75
Setting of an Output
76
Forcing the IP Outputs
77
Monitoring of Signal Acquisition
77
Interrupt Generation and Processing
78
Masking Interrupts
78
Reading the Interrupt Request Bytes
78
Status Bit NPUE Is Reset on the IP
78
Error Following a Reference Point Approach
79
Errors Following Transfer of a Zero Offset
79
Track Comparison Following Configuring and in the Event of an Error
79
Preparations for a Reference Point Approach
80
Reference Point Approach
80
Status Bit SYNC
80
SYNC Is Reset
80
Aborting a Reference Point Approach
81
Sequence Diagram for Reference Point Approach
81
Configuring Function Block
82
Function Block Call
82
Initializing Standard Function Blocks and Data Block Assignments
82
Parameter Assignments
83
Parameters for Configuring FB 169
83
Control Function Block
87
Contents of the Data Block
89
Control Bits
90
Status Bits
90
Identifier of the Configured Mode and Data Block Number
91
Interrupt Request Byte for Channel 1 and Channel 2
91
Actual Value (IST) in BCD Code
92
Actual Value (IST) in Binary Code
92
Identifiers of Tracks Used
92
Initial Value of the First Track (ANF 1)
92
Example of Track Limit Arrangement
93
Final Value of the First Track (END 1)
93
Zero Offset (NVER)
93
An Example of Position Decoding: Heat Treatment
94
Assignment of the Zones of a Workpiece to Tracks
94
Aborting Heat Treatment
95
Faults
95
Heat Treatment
95
Preparatory Measures for Heat Treatment
95
Data Block 10
96
Stipulations
96
Inputs, Outputs, Flags, Timers and Counters Used
97
Start Routine FB 20
101
Cyclic Program FB 21
102
Operation/Traverse Program FB 25
103
Control and Output Program FB 26
104
Interrupt Service Routine FB 27 and FB 28
105
Error/Interruption Control
116
Contents of the Data Block
124
Principle of Operation
126
Activating Counting
126
Generating the Actual Value
126
Counting Range and Overrange
126
Transferring a New Initial Value ANF to the IP
127
Reading the Final Value
128
Overrange
128
Storing the Final Count
128
Final Value
128
Sequence Diagram for Counting Mode
129
Flagging with Status Bits
130
Status Bits for the Actual Value
130
Status Bits for the Final Value
130
Masking the Interrupts
131
Setting the ABIT Parameter
131
Initializing Standard Function Blocks and Data Block Contents
132
Parameters for Configuring FB 171
133
Interrupt Request Bytes for Channel 1 and Channel 2
140
Bits for the Configured Mode and Data Block Number
140
Status Bits for the Final Value and Final Value in Binary
140
Actual Value in BCD
141
Actual Value in Binary
141
Example for Counting: Fast Filling with Loose Material
142
FB 40 Initialization Program
146
FB41 Cyclic Program
146
Speed Measurement with the IP 252; DRS Controller Structure
156
IP 252 Expansion
156
Actual Speed Measurement Via the IP 240 Module
157
Assignment of IP 240 Modules to IP 252 Modules
157
Data Interchange between S5 CPU -- IP 240 -- IP 252
158
Configuring
159
Configuring the Modules
159
Configuring the Module in the IP 252 Expansion Mode
160
Parameters of Configuring FB 173
160
Data Block Contents
162
Application
167
Application and Functional Description
167
Overview of IP 240 Configuring and Synchronization Options
167
Positioning
167
Configuring the IP, Data Interchange
168
Controlled Positioning
168
Controlled Positioning with the IP 240
168
Functional Description
168
Configuring and Approaching a Position
169
Switching IP Digital Outputs D1 and D2
169
Approaching a Position
170
Switching and Signalling Ranges for a Position
170
Approaching the Position in Positive Direction
171
Status Bits on Approach to Position
171
Approaching the Target Position in Negative Direction
172
Axis Types and Actual Value Ranges
172
IP Outputs Control the Traverse Speed
173
Setting the IP Outputs Separately
173
Switching the IP Outputs
173
Backlash Compensation
174
IP Outputs Control the Direction of Travel
174
The IP Outputs Control the Direction of Travel
174
Actual Value-Dependent Interrupt Generation
175
Methods of Synchronization
175
Synchronization with an Internal Control Bit
175
Binary Representation
176
Configuring the Ip's Performance Characteristics
176
Numerical Representation
176
Synchronization with an External Control Signal
176
BCD Representation
177
Specifying the Numerical Representation (BCD)
177
Data in the Data Block and in the Transfer Buffer
178
If the Data Interchange with the IP 240
178
Numerical Representation of 4-Byte Data Items
178
1-Byte-Data
179
2-Byte-Data
179
Axis Types
180
Linear Axis
180
Numerical Representation and Ranges for Input and Output Values
180
Rotary Axis
180
Rotary Axis (RUND)
181
Maximum Traversing Speed
182
Specifying the Axis Type and the Final Value for the Rotary Axis
182
Selecting the Switching Performance of the IP Outputs (DAV)
183
Outputs Are Set Collectively
184
Outputs Are Set Separately
184
The IP Outputs Control the Direction of Travel
184
The IP Outputs Control the Traversing Speed
184
Recommendations for Selecting the Switching Performance
185
Switching Performance of the IP Outputs When DAV=2
185
Contactor Control of a Three-Phase Motor
186
IP 240 Controls Direction of Travel
186
IP 240 Controls Traversing Speed
186
Backlash Compensation During Positioning
187
Configuring Backlash Compensation
187
Approaching a Position with Backlash Compensation
188
Actual Value Generation
189
Backlash Compensation During Reference Point Approach
189
Actual Value Range and Overrange
190
Actual Value Range and Overrange in Positioning Mode
190
Evaluation of the Encoder Pulses
190
Resolution (AFL)
190
Relative Zero Offset
192
Additive Zero Offset
193
Specifying the Zero Offset
193
Position Data for Positions 1 to 254
195
Position Value and Position Number
195
Position Numbers in the Data Block
196
Position Values in the Data Block
196
Distance Values of the Switching and Signalling Ranges
197
Position Setup
197
Monitoring Signal Acquisition (IMP)
199
Initializing Zero Point Monitoring
200
No Zero Mark Monitoring
200
Zero Mark Monitoring
200
Zero Mark Monitoring Must be Deactivated
200
Initializing the Parameters for Interrupt Generation
201
Status Bits with Interrupt Capability / Associated Interrupt Bits
201
Error Processing after Configuring
202
Initializing the ABIT Parameter
202
Controlling the IP and Evaluating IP Data
203
Data Interchange Using Control Function Block FB 168
203
Direct Data Interchange
203
Methods of Synchronization
204
Reference Point Approach
204
Software-Controlled Synchronization
204
Control Bit HASY
205
Approaching the Reference Point
206
Approaching the Starting Point
206
Sequence of a Reference Point Approach
206
Switching the IP Outputs During Reference Point Approach (HAND=0)
208
Backlash Compensation During Reference Point Approach (LOSE=1)
209
Interrupts During Reference Point Approach
210
Interrupting a Reference Point Approach
211
Interrupting a Reference Point Approach with FREI=0
211
Software-Controlled Synchronization
211
The SOSY Control Bit
211
Evaluating the in Signal
213
Synchronization with an External Control Signal
213
The ZYSY Control Bit
213
Acquisition of the in Signal During Cyclic Synchronization
214
Tranfer of Control Bits Without Position Number
215
Transferring Control Bits to Select a Synchronization Mode
215
Selecting a Position
216
Selecting a Stored Position between 1 and 254
216
Disable the Outputs
217
Sequence for Selecting a Position between 1 and 254
217
Selecting Position 0
218
Valid Position Data for Position 0
218
Transferring the Position Data for Position 0
219
Control Bits for Firmware Control of the IP Outputs
220
Control Bits FREI and HAND
220
Controlling the Digital Outputs During Positioning
220
Controlling the IP Outputs
220
Control Bits for Disabling the IP Outputs
221
Control Bits for S5 CPU Control of the IP Outputs
221
Controlling the IP Outputs Via the S5 CPU (HAND=1)
221
Controlling the PLC Outputs
222
Transfer of the Control Bits
222
Reading and Evaluating the IP Status Information
223
Evaluating the Status Information
224
Feedback Position Number
224
Reading the Status Information from the IP 240
224
The Status Bits
224
Reading the Interrupt Request Bytes
227
The Actual Value
227
The Final Value
227
Modifying the Position Data and the Zero Offset
230
Modifying the Position Value
231
Transferring New Position Values for Positions 1 to 254
232
Changing the Distance Values for Ranges BEE1 to BEE3
233
Changing the Zero Offset
234
Actual Value Is in Range BEE2
236
Actual Value Is in Range BEE3 (Target Range)
236
Interrupting Positioning and Skipping of a Position
236
Start of Positioning Within a BEE Range
236
IP Responses at the Start of Positioning
237
Positioning with the IP Controlling the Speed
238
Positioning with the IP Controlling the Direction
239
Error Processing Following Positioning Control
240
Reading the Error Flags from the IP 240
240
Creating the Data Block
241
Data Block Contents and Initializing the Standard Function Block
241
Contents of the Data Block (DW 0 to DW 821)
242
Contents of the Data Words
243
Function Number for Indirect Initialization of Control FB 168
243
Absolute Address of the Configured Module
244
ID for the Configured Mode and Data Block Number
244
Position Number and Position Value for Positions 1 to 254
250
Invoking the Function Block
251
The Configuring Function Block
251
Parameters for Configuring FB 167
252
FB 168 (STEU.POS) Control Function Block for ”Positioning” Mode
256
Initializing the Data Block Number
256
Initializing the Function Number
256
The Control Function Block
256
Invoking the Control Function Block
257
Sample Program for Processing Data Words with a Data Word Number Exceeding
260
Example: Removing Parts from a Die-Casting Machin
264
Positioning a Workpiece to a Specified Position
264
Flags, Inputs, Outputs, Timers and Dbs
265
Cyclic Program (FB 30)
268
Functional Sequence
268
Restart Routine (FB 20)
268
Cyclic Program for X Axis (FB 30)
269
Reference Point Approach FB 31
270
Select Next Position (FB 32)
271
Select and Approach Position (FB 33)
272
Interrupt Service Routine for X Axis (FB 34)
273
Direct Data Interchange with the IP 240
297
Contents of the Status Register
298
Status and Job Request Register (Offset 15)
298
The ERR Bit
298
The IDLE Bit
298
Job Request Register
300
Data Transfer from the IP 240 to the S5 CPU
301
Data Transfer from the S5 CPU to the IP 240
303
Write Data to the IP 240
303
Contents of the Transfer Buffer
306
Position Decoding Mode
306
Read Actual Value and Status Area
306
Description of the Interrupt Bits
307
Read Interrupt Request Bytes
307
Write Initial and Final Track Values
308
Write Zero Offset
308
Description of the Control Bits
309
Write Control Bits
309
Counting Mode
310
Write Initial Count
312
Reading Error Messages
313
Reading Data from the IP 240
314
Sample Programs
314
Writing Data to the IP 240
316
Response Times
321
Structure of a Firmware Cycle
321
Structure of a Firmware Cycle (Example)
321
Computing the Response Time
322
Response Time for Evaluation of Inputs in and GT
323
Firmware Execution Times
324
Firmware Execution Times, Position Decoding Mode
324
Encoder Signals
329
Signal Forms
329
Skew between the Signals of a Track
330
Skew between Tracks a and B
330
Timing Requirements
330
Z Signal
330
Position and Timing of the Z Signal
331
Timing at Binary Input in
332
Timing Diagram for Asymmetrical Encoders
332
Timing Requirements for Encoders with Asymmetrical Signals
332
Connection of the Preliminary Contact Signal to the in Input
333
Timing Diagram for Reference Point Approach, Positioning Mode
333
Connecting the Synchronization Signal to the in Input
334
Timing at Counting Input CLK and at Binary Input GT
334
Error Messages
337
Errors Flagged in the PAFE Byte
337
Hardware Faults
337
Error Messages in Position Decoding and Counting Mode
338
Communications Errors
339
Error Messages in IP 252 Expansion Mode
339
Error Messages in Positioning Mode
339
Data Errors
340
Data Errors in Positioning Mode
340
Communications Errors in Positioning Mode
342
Adapter Casing (S5 Adapter)
343
Prerequisites
344
Installing an Adapter Casing in the S7-400
345
Inserting an S5 Module into the Adapter Casing
346
Inserting S5 Modules in the Adapter Casing
346
Interrupt During Active OD
347
Interrupt Processing
347
Technical Specifications
348
Addressing S5 Modules
349
I/O Area
351
Page Area
351
S5 Address Areas
351
The IP 240 Counter, Position Decoder and Positioning Module
353
Overview
354
Counting Functions
356
Function FC 171 (STRU_DOS)
356
Function FC 172 (STEU_DOS)
357
Function FC 164 (STRU_WEG)
359
Position Decoding Functions
359
Function FC 170 (STEU_WEG)
360
Function FC 167 (STRU_POS)
362
Positioning Functions
362
Function FC 168 (STEU_POS)
363
Differences between SIMATIC S7 and SIMATIC S5
365
Programming Example for “Counting” Mode
366
Prerequisites, Settings, Blocks and Addresses
366
Start-Up Program and Error Responses
369
Cyclic Program
370
Interrupt Program
371
Programming Example for “Position Decoding” Mode
372
Programming Example for "Positioning" Mode
379
Index
388
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Siemens Simatic S5 IP 240 Equipment Manual (172 pages)
Brand:
Siemens
| Category:
Control Unit
| Size: 2.43 MB
Table of Contents
Table of Contents
13
General Function Description
23
Short Description
24
Application Area
25
Applicationarea
25
Hardwaredescription
26
Mechanical Setup
26
Diagnosticleds
28
Plug Connectorallocation
30
Functional Setupofthe Module
33
Process Interfaces
35
Encoderinterface
36
Digital Lnputs(Dl)
40
Digital Output (DQ)
43
Voltage Supply Forlncremental Encoders
44
Communicationwiththesimatic S5
45
2 Hardware Settings
46
Location Ofthe Setting Elements
47
Settingthe Dilswitches
49
Settingthe Plug-Lnjumpers
53
Software Settings
59
3 Softwaresettings
59
General
60
Definition Ofthe Registers
60
Selectingthe Registers
61
Reading and Writing the Registers
62
Select Register
63
Selectregister
63
Load Register
64
Interrupt Register
66
Countervalueregister(Cvr)
68
Status Register
73
Parameter Registersand Control Registers
75
Parameterregisters and Control Registers
75
3.10 Overview of the Register Addresses
77
4 Interrupt Processing
78
Reaction Times During Interrupt Processing
82
Interruptsources
84
Guidelinesforlnterruptprocessing
86
Hysteresisofthe Lnterruptvalue
87
Commissioning the Counter Module
88
5 Commissioningthecounter Module
88
Commissioning Guidelines
89
RESET Behavior
92
Basic Setting Ofthelp281 after RESET
92
Resetcauses
92
Evaluation Ofthe Status Registers
93
Changing the Direction Ofcounting
96
Changing the Directionofcounting
96
Overviewofthe Operating Modes
97
Table of Contents
98
6 Operating Modes and Functions
99
Introduction
99
Countersettings
100
Counting Mode
100
Counting Pulse Evaluation
102
Autonomous Operating Modes
105
Overview
105
Continuouscounting (CONC)
106
One-Time Counting with Software Start (OCSS)
107
One-Time Counting with Hardware Gate Start (OCHG)
109
Cyclic Counting with Software Start (CCSS)
111
Cyclic Counting with Hardwaregate Start (CCHG)
113
Combinationoperating Modes
115
Combination Operating Modes
115
Overview
115
Transferringthecountingvalue Tothelnterruptregister(TCAR)
116
Transferringthecountingvalue Tothe Load Register(TCLR)
117
Connectingthezeromarking Pulse to Counter2(ZMPC)
118
Handling Thecounters
121
- Loading by the S5
121
Loading the Counters
121
Loading with Thezero Pulseand S~Lnput (Synchronization)
122
External Resetofacounter
125
Controlling both Counters Synchronously
126
Gate Control
128
Gatecontrol
128
Activatingthe Gatecontrol
129
Hardwaregatecontrolwith Level (GALE)
130
Emergencyoffgate Stop
131
Software Gatecontrol
131
Method Ofoperation of the Digital Outputs
132
Overview
132
Digital Output Switched off(DQNU)
133
(Dqau)
134
Digital Outputactive Inthe Range between the Lnterruptvalue and Underflow
134
(Dqao)
135
Counting up(DQIU)
136
Counting down(DQID)
137
Block Circuit Diagram
138
Programming Example
139
General
140
Startup
143
Cyclic Program
144
Interruptprocessing
145
Program
146
8 Technical Specifications
152
Counterinputs
153
Counting Frequencies
154
Powersupply
155
Environmental Requirements
156
Connection Cablesfor Incremental Encoders
158
Requirements Onthelnputsignals
162
Definition Ofterms
166
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