Siemens SIMATIC S5 1P 243 Equipment Manual
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Siemens SIMATIC S5 1P 243 Equipment Manual

Siemens SIMATIC S5 1P 243 Equipment Manual

Analog module with fb 160, fb 161
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Analog
Module
with FB 160/
FB 161
Equipment Manual
Order No: 6ES5998–0KF21
Subject to change without notice
Application and Application Area
Mechanical Construction
Function Description
Interrupt Processing
Putting into Operation
Technical Specifications
Programming Instructions
2
3
4
5
6
8
9
10

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Summary of Contents for Siemens SIMATIC S5 1P 243

  • Page 1 Application and Application Area Mechanical Construction Function Description Analog Module Interrupt Processing with FB 160/ FB 161 Putting into Operation Equipment Manual Technical Specifications Programming Instructions Order No: 6ES5998–0KF21 Subject to change without notice...
  • Page 2 Passing on and reproduction of these documents, or utilization and disclosure of their con- tents is prohibited unless specifically authorized. Violations are cause for damage liability. All rights reserved, particularly in the event a patent is issued or a utility–model patent regis- tered.
  • Page 3 Siemens. In the event of product liability damages due to the use of so–called SIMATIC–compatible mod- ules, Siemens is not liable since we took timely action in warning users of the potential hazards involved in so–called SIMATIC– compatible modules. ”...

  • Page 4: Table Of Contents

    Contenta Application and Application Area ........1 – 1 Mechanical Construction .
  • Page 5 Contenta 4 – 1 Interrupt Processing ..........4 –...
  • Page 6 All obligations on the part of Siemens are based on the respective purchase order which also con- tains the complete and solely valid warranty provisions. This 1P 243 equipment manual neither widens nor restricts these contractual warranties.

  • Page 7: Application And Application Area

    Application and Application Area R 02/92 The 1P 243 is a module for input and output, for preliminary processing, and forjumpering of ana- log signals within short processing times. The submodule in its full configuration has eight quick analog input channels with max. 35 psec. conversion time, four input channels with analog value conditioning and four analog output channels.

  • Page 8: Mechanical Construction

    Mechanical Construction Mechanical Construction Dimensions and Mechanical Data The 1P 243 is a printed circuit board in double European format, with dimensions of 233.4 mm x 160 mm (DIN 41494). In accordance with the SIMATIC S5 compact peripheral system, the PCB takes up one slot in the rack.
  • Page 9 R 02/92 Mechanical Construction The following table shows which components are for the part-configuration versions: Full Con figura- Part Configura- Part Configura- tion Module 243- IAA 243–1 AC Type — converter, 12 bits — D/A converter, 12 bits — D/A converter, 8 bits (with driver) Analog value conditioning circuit...

  • Page 10: Block Diagram 1P 243 - Iaa, Full Configuration

    Mechanical Construction R 02/92 Block Diagram 1P 243 – IAA, Full Configuration inputs 2 – 3...

  • Page 11: Block Diagram 1P 243- Iab, Partial Configuration

    02/92 Mechanical Construction Block Diagram 1P 243- IAB, Partial Configuration Measuring sockets Analog signal jumpering Analog 4 analog value actual values (Soldering base)
  • Page 12 Mechanical Construction 2 Difference (P controllers) Analog signal jumpering Analog values (Soldering base) 8 bits + Analog amplifier (driver) 2 – 5...

  • Page 13: Binary Input

    Function Description 3 Function Description Binary Input The characteristics of the eight digital input channels BIO to B17 are: – Rated input voltage : 24 V DC – Input voltage for signal”1” : 12.7 Vto 30 V – No potential isolation –...

  • Page 14: Binary Output

    Function Description Binary Output Eight digital output channels (BOO to B07) are available which, however, are only used for trigger- ing of indicator elements ( e.g., lights). Contrary to the standard S5 set–up no BASP signal is generated. Other characteristics: –...

  • Page 15: Analog Input

    Function Description Analog Input 3.3.1 Rated Input Ranges The analog input is applicable to the following voltage ranges: –5 v to +5 v –lo v to +10 v o v to +10 v The ranges can be set via jumpers on the module (seethe layout plan in section 5.4, Setting Ele- ments and Jumpers).

  • Page 16: Conversion Of The Analog Input Signals

    Function Description R 02/92 3.3.2 Conversion of the Analog Input Signals The central circuit of the analog input is the analog/digital converter which converts an applied setpoint in a maximum of 35 ~sec. with a resolution of 12 bits. An analog eight–channel multiplex- er is connected on the input side of the converter.

  • Page 17: Inputcircuitry

    Function Description 3.3.3 Input Circuitry At the pins AR1 to AR8 of the analog signal jumping block, the analog input AIO to A17 can be not only active, but they can also be switched to the inputs of the analog–value conditioning circuit or to the outputs of the difference amplifiers.
  • Page 18 R 02/92 Function Description The coding of the analog input signals is accomplished by accepting only the positive values in V tol O V the range O V to 20 V (rated input range &10 respectively O (rated input range i-5 V). The digital values are then referred to the rated input range and are allocated in accordance with the following table.

  • Page 19: Analog Output

    Function Description R 02/92 Analog Output 3.4.1 Jumpering of Analog Output Five channels are available (AO1 to A05) which can be freely distributed via the soldering base. It is possible to output analog values (provided by the D/A converters) on a certain channel, and transfer this signal simultaneously to different outputs.

  • Page 20: Digital Representation Ofanalog Values

    R 02/92 Function Description 3.4.2.3 Digital Representation of Analog Values Two bytes are required for representing the values, the output from DAC1 and DAC2, in digital form. HIGH byte LOW byte X: irrelevant Module address +1 Module address +3 The representation of the digital values in the bit pattern is to be interpreted in a way that the output voltage range *1 O V is only considered as a positive range within O V to +20 V.

  • Page 21: Digital/Analog Converter3

    Function Description R 02/92 3.4.3. Digital/Analog Converter 3 3.4.3.1 Rated Output Range and Resolution The digital/analog converter DAC3 has an 8–bit resolution. Unipolar analog values in the range O V to +10 V can be output. The analog output amplifier should be added on the output side of DAC3 to amplify the analog output signal, as output current from DAC3 is too low to carry a load.

  • Page 22: Analog Outputamplifier

    R 02/92 Function Description 3.4.4 Analog Output Amplifier 3.4.4.1 Description Mainly in cases where DAC3 is used for analog output, the analog output amplifier is added on the output side of the digital/analog converter as a voltage booster. This is necessary because the converter is not permanently “short–circuit proof”...

  • Page 23: Analog Value Conditioning Circuit

    R 02/92 Function Description Analog Value Conditioning Circuit 3.5.1 Operating Elements The four inputs of the analog value conditioning circuits are meant to standardize the voltages provided by encoders to the O V to +10 V range, and are conditioned in accordance with the set- ting of the trimming potentiometer on the module front plate.
  • Page 24 Function Description The following block diagram shows the operating method of the analog value conditioning circuit: O crating point o set –2 Front connector Gain setting Input time Analog signal constant jumpering x 1 to 10 Multiplication constsnt AR13 toAR16 –...

  • Page 25: Inputcircuitry

    R 02/92 Function Description 3.5.3 Input Circuitry Input circuitry for value conditioning (per input) — 1 nF Attention: The input constant of approximately 0.1 msec. was selected to filter out possible interferences. The delay is approximately proportional to the ca- pacitor 1 nF.

  • Page 26: Comparatorsand Gating Logic

    Function Description Comparators and Gating Logic 3.6.1 Input Signal Range and Possible Circuitry The two comparators are designed to compare positive voltages in the range of O V to +10 V. If negative input voltages need to be compared, they must be routed through the analog value con- ditioning circuit and converted to a positive value.

  • Page 27: Inputcircuitry

    Function Description 3.6.2. Input Circuitry Input circuitty for each comparator 2.2 k~ +5 v +15 v 22 k~ Xl 9 Pins 7/8 Analog signal logic output 22 k~ M .“= Data bus *routed to interrupt Attention: When comparators are used to compare voltages, the circuit specific, absolute hysteresis of approximately 4.4Y0 of the voltage difference between comparator output (O V/5 V) and input COMP+ (O V to 10 V) must be considered.

  • Page 28: Evaluation Ofthe Comparator States

    Function Description Write to module address +7 2’ 2° STROBE for comparator gating logic interrupt, signal STR O = locked, 1 = released Changeover of gating logic, signal LOG 1 = falling edge of comparator output O = rising edge of comparator output, The default status of the STROBE signal is”1”.
  • Page 29 Function Description 3.6.4.2 Value Table for Comparators 1 and 2 Input voltage at Bits Status Signals comparators 1 and 2 Comparator + Comp status 1 and 2 STROBE – Comp Attention: The input voltages applied at the comparators are identified as U in the value table where U is always greater than U Explanation of signal names:...
  • Page 30 R 02/92 Function Description 3.6.4.3 Explanation of the Value Table and the Individual Values Some important deductions can be drawn from the value table presented below. A clear definition of the status of the comparators and gating logic is dependent on the evaluation of “bits” A, B, C, and D.

  • Page 31: Representation Inthetime/Voltage Diagram

    Function Description Diagram Representation in the Time/Voltage + Comparator r —— r —-1 – Comparator “Bits” A/C — “Bits” B/D STROBE — Interrupt IR Interrupt extension module The signals LOG and STROBE were selected randomly for this example.

  • Page 32: Differenceamplifier(P Controller)

    R 02/92 Function Description Difference Amplifier (P Controller) 3.7.1 Input Signal Range and Amplification Voltages in the range from – 10Vto + 10 V can be applied at the input of the two difference amplifi- ers. The desired amplification is set via the trimming potentiometer. For each of the two P control- lers, one trimming potentiometer is available on the module front plate, and amplification factors from 1.1 to 20 can beset.

  • Page 33: General Conditions For Interrupt Processing

    Interrupt Processing Interrupt Processing General Conditions for Interrupt Processing This section now covers specific characteristics of interrupt processing in relation to the individual programmable controllers. Interrupt jumpering on the 1P 243 is described in section 5.7. An interrupt can only be triggered by the comparators or the gating logic on the output side. The condition for generating an interrupt is its enable by the signal STROBE.
  • Page 34 R 02/92 Interrupt Processing In the S5–115U with CPU 941A, interrupt lines ~Aand ~B are available for CPU 941B, terrupts can be initiated, are available. The two pins IRF and ~Gon the interrupt–jumper~g block X19may not be used; they must always be grounded on M (pin 6). The same applies to IRC and ~Dwhen CPU 941A is installed.
  • Page 35 Interrupt Processing The required solder connections on the jumpering block for analog signals are: Front connector S5 bus amp. amp. Socket 6 Socket 5 Socket 4 Socket 3 Socket 2 Socket 1 1 0 9 2 3 1 2 1 1 2 4 20 1 ! 1 7 Pin Signal 20 + 15 v 12 bits...
  • Page 36 Interrupt Processing R 02/92 The pins of the binary signal/interrupt jumpering are connected as follows: Front connector S5 bus 1 ;24V 2 +24V 11 610 12 Bll Binary input 2 13 B12 Binary input 3 14 613 Buffer Binary input 4 15 614 Binary input 5 16 615...
  • Page 37 Attention: Save the scratchpad flag bytransferring itto a data block. Atthe end, the scratchpad flag must be read into the interrupt processing. The flag bytes 255 are to FY defined as scratchpad flags. 4 – 5 Siemens AG 1989, Order No: 6ES5 998-0KF21...

  • Page 38: Lnterruptprocessing Inthes5-135U With Cpu 9220Rcpu 928A/B

    R 02/92 4.3.2 Interrupt Processing in the S5–135U with CPU 922 or CPU 928A/B In the multiprocessor system S5–135U, the four interrupt lines ~A, ~B, ~G and ED are allocated to one CPU slot per tine: CPU 1 CPU 2 – Interrupt ~B –...
  • Page 39 Interrupt Processing R 02/92 Analog signal jumpering: Socket 6 Socket 5 Socket 4 Socket 3 Socket 2 Socket 1 Pin Signal 20 + 15 v 21 – 15V 23 M ana 24 AV1 25 AV2 26 AV3 27 AV4 32 A05 33 M ana Multiplexer * Chan.
  • Page 40 R 02/92 Interrupt Processing Binary signal/interrupt jumpering: Pin Signal 1 +24 V 2 +24 V 11 BIO Binary input O 12 Bll Binary input 1 Binary input 2 13 B12 Binary input 3 Buffer Binary input 4 15 B14 16 B15 Binary input 6 17 B16 Binary input 7...
  • Page 41 R 02/92 At first, the DX O for the CPU 928A/B and the CPU 922 must be parameterized for edge–triggered interrupt processing. The DX O for the two central processors is as follows: O : KH = 4D41 > 1 : KH = 534B 2 : KH = 5830 3 : KH = 0601 4 : KH = 2001...
  • Page 42 Interrupt Processing R 02/92 FB Z1 NETWORK 1 Interrupt reaction 0000 (CPU 922) NAME :INTERRUPT 922 0005 KM OIXXXOO1 Read in All 0007 Select ADC 0008 PY 134 Convert ADC Pw 134 Read ADC 0009 KF +3000 Load KF = +3000 :>F Compare for excess value Q 12.0...
  • Page 43 R 02/92 Interrupt Processing FB Z2 NETWORK 1 0000 NAME :INTERRUPT 928A/B Interrupt reaction (CPU 928A/B) 0005 PY 132 Read binary inputs 0006 Evaluate B13, B14, B15 0007 65.3 0008 65.4 0009 65.5 66.0 66.0 :BEB KH OOFF Load KH=OOFF Overwrite QB 12 0010 For the saving and loading of scratchpad flags, the system organization blocks OB 190 to OB 193...

  • Page 44: Separate Interrupt Lnputmodule

    R 02/92 Interrupt Processing Separate Interrupt Input Module If a programmable controller is designed for fundamental mode operation (level–triggered mode), i.e., the CPU only reacts when a certain level is active on the interrupt lines, or if a control without interrupt lines on the S5 bus is involved, interrupts can only be evaluated by means of a separate binary input module with process interrupt generation.
  • Page 45 Interrupt Processing R 02/92 Analog signal jumpering: Socket 6 Socket 5 Socket 4 Socket 3 Socket 2 10923 1211242019 1718 Socket 1 Pin Signal 20 + 15 v 12 bits 21 – 15 v 23 M ma 24 AV1 25 AV2 26 AV3 27 AV4 12 bits...
  • Page 46 R 02/92 Interrupt Processing Binary signal interrupt jumpering: 1 +24V 2 +24V 11 BIO 12 Bll 13 B12 Binary input 3 Buffer 14 B13 Binary input 4 15 B14 Binary input 5 16 S15 Binary input 7 Comparator 1 Comparator 2 Soldering base {z D9 I 4 BO1...
  • Page 47 Interrupt Processing On the interrupt module6ES5432-4UA1 1 various presetting are required. For the relevant input in this case the setting “rising edge” was selected. The module address is given as 128. For a more detailed description of interrupt procedures, see the appropriate equipment manual. Simplified user program for scanning the interrupt inputs: NETWORK 1 0000...
  • Page 48 R 02/92 Interrupt Processing 4.4.2 Interrupt Processing in the S5–150U/S The systems S5–150U/S have no interrupt lines. In this case an interrupt signal is only possible via evaluation of the peripheral byte O. For details of this procedure seethe appropriate equipment manual.
  • Page 49 Interrupt Processing Analog signal jumpering: Socket 6 Socket 5 Socket 4 Socket 3 Socket 2 1109231211 ?4 2019 Socket 1 Pin Signal 20 + 15 v 21 – 15V 23 M,m 24 AV1 L 2 2 25 AV2 14 A 26 AV3 27 AV4 28 AO1...
  • Page 50 R 02/92 Interrupt Processing Binary signal/interrupt jumpering: Pin Signal 1 +24V 2 +24V Binary input O Binary input 1 12 Bll Binary input 2 13 B12 14 B13 Binary input 3 Buffer 15 B14 Binary input 4 Binary input 5 16 B15 Binary input 6 17 B16...
  • Page 51 Interrupt Processing R 02/92 User Proaram 0000 NETWORK 1 0000 Enable interrupt (“STROBE”= 1) and KM O1XXX1O1 0001 Reaction to rising edge 0003 (“LOG’ ’= O); selection of channel A15 0004 Convert ADC 0005 PW 246 Read ADC 0006 Store 0007 converted value 0008...
  • Page 52 R 02/92 Interrupt Processing NETWORK 1 0000 Interrupt reaction S5–1 50U/S NAME :INTERRUPT 150 0005 KM O1XXXO1O Select channel A12 at the ADC 0007 PY 247 PY 246 Convert A12 0008 Read A12 PW 246 0009 Store converted value PY 246 Convert A12 PW 246 Read A12...

  • Page 53: Interruptprocessing Inthe S5-155U/H

    Interrupt Processing R 02/92 With the S5–155U, the evaluation of interrupts is accomplished the same way as with the the additional possibility of interrupt requests via interrupt lines, but it cannot be put to use directly in connection with the 1P 243, as the hardware interrupts operate in level–triggered mode. Proceed as described in section 4.3.2 when using a CPU 922 or a CPU 928A/B (edge- triggered) in PLC S5-155U.
  • Page 54 Interrupt Processing Analog signal jumpering: Socket 6 Socket 5 Socket 4 Socket 3 Socket 2 10923 1211242019 1718 Socket 1 Pin Signal 20 + 15 v 21 – 15 v 23 Maria 24 AV1 25 AV2 26 AV3 27 AV4 28 AO1 29 A02 30 A03...
  • Page 55 Interrupt Processing R 02/92 Binary signal/interrupt jumpering: 11 BIO 12 Bll Binary input 1 13 B12 Buffer 15 B14 16 615 17 B16 18 B17 . ,() ‘~: Comparator 1 Comparator 2 9 Solj:rp base :2 Interrupt driver 3 BOO ~ Binary output O —...
  • Page 56 R 02/92 Interrupt Processing NETWORK 1 0000 OB 1 for S5–155U 0000 Enable interrupt (“STROBE’’=1) and KM 1lXXXXXX 0001 PY 183 Reaction to falling edge 0003 0004 Load stored value 0005 0006 PW 178 Write DAC2 PY 180 Read binary inputs 0007 0008 F 192.2...
  • Page 57 Interrupt Processing R 02/92 Interrupt OB (S5– 155U) at excess value NETWORK 1 0000 Save scratchpad flag 0000 0001 NAME :SAVE 0002 Load comparator states 0003 0004 :AN F 196.1 Evaluate parameter bit “B” 0005 Interrupt reaction at excessive value 0006 0007 NAME :INTERRUPT 1 0008...

  • Page 58: Putting Into Operation

    Putting into Operation R 02/92 5 Putting into Operation Basic Connector Any of the three 1P 243 versions (i.e., with full or part configuration) has a basic connector which provides the link to the SIMATIC S5 bus, and the S5 bus, respectively. This connector is located on the upper half of the module.
  • Page 59 R 02/92 Putting into Operation Schematic diagram of the front connector: LED areen: + 24 V external + 24 V external existing, fuse okay 3 – BOO 4 – BO1 5 – B02 presentlv selected analoa channel at 6 – B03 8 binary outputs 7 –...

  • Page 60: Explanation Ofthe Signal Names Andabbreviations

    R 02/92 Putting into Operation Explanation of the Signal Names and Abbreviations +24 V Supply voltage +24 V DC O V reference potential (M from +24 V supply) O V reference potential (analog) Binary outputs O to 7 BOO to 607 Binary inputs O to 7 Analog input channels 1 to 4 with analog value condition Analog output channels 1 to 5...

  • Page 61: Layoutofsetting Elementsand Jumpers

    R 02/92 Layout of Setting Elements and Jumpers Jumper A–B closed: S5 central rack open: ex~ansion rack 10 A Q INTERRUPT Amplification AVl amplification difference 1 difference 2 R I R46 R46 R47 Selection of the input voltage range 0 - 0 - 0 0 - 0 - 0 0 0 0 0 UNI Bi 10 V 20 V DAC2 DACI OAC2 OACI...

  • Page 62: Jumpering Oftheanaiog Signals

    Putting into Operation 5.5.1 Circuitry of the Analog Signal Jumpering The two soldering bases X29 and X32 (see section 5.1) form the basis for the jumpering of the analog signals. Via these bases, by means of soldering in jumpers, the required analog signals or the different internal module components can be connected in a user–specific way.

  • Page 63: Soldering Base Pinassignment

    Putting into Operation 5.5.2 Soldering Base Pin Assignment The analog signal jumpering comprises the two 16–way soldering base X29 and X32 (see section 5.4, Layout of Setting Elements and Jumpers). The available 32 pins of the soldering bases have the following signal assignment: AR32: Socket 5 on front plate (free measuring wing point) AR31: Socket 6 on front plate Maria AR30: output of DAC3...
  • Page 64 Putting into Operation R 02/92 AR15: Output analog value conditioning AV2 socket 2 AR14: Output analog value conditioning AV3 socket 3 AR11: Input difference amplifier 2” –difference” AR9: Input difference amplifier 1 “ –difference” 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 Soldering base X32 3 4 - AR8: Analog input channel A17/channel 7 of ADC...
  • Page 65 Putting into Operation The binary signals are also conducted via a soldering base and can be interswitched in a user– specific way. If desired, the interrupt evaluation is also activated via the binary signal jumpering. The digital inputs and outputs can be directly read in or read out via the bus. For interrupt processing, however, jumpers must be installed on the soldering base X19.
  • Page 66 R 02/92 Putting into Operation Interrupt Jumpering If an interrupt evaluation is intended, this is possible with the programmable controllersS5–11 5U/ H and S5–135U with CPU 928A/B or CPU 922 (or same CPUS in PLC S5–155U) via direct bus access to the interrupt lines. All other control devices require an additional binary input module with process interrupt generation and external wiring.
  • Page 67 R 02/92 Putting into Operation is o~erated with a different rxo~rammable interrupt processing directly via the bus, then the corresponding pins of the interrupt lines must be free from their soldered connections. All unused interrupt lines must retain their jumper connection with grounding M.

  • Page 68: Setting The Moduleaddress

    R 02/92 Putting into Operation Setting the Module Address The module address is set via the DIP FIX switch on the soldering base X2 (see the layout of setting elements in section 5.4). Addressing in the 1/0 area is between the starting addresses 128 and 248.
  • Page 69 Putting into Operation Addressing at the SIMATIC S5 system bus appears as follows: SUB SUB SUB - ;;: section 7.5.) Module startin address (jumper setting 17 -t 2 = 16 and 10 – – – – – – –O 18 5 –...

  • Page 70: Technical Specifications

    Technical Specifications Technical Specifications Binary Inputs: 24VDC Rated Input Voltage ......Number oflnputs ......Galvanic Isolation .
  • Page 71 Technical Specifications Analog Inputs: Input Signal Ranges ......*5 V ....... . . — .
  • Page 72 Technical Specifications R 02/92 8–Bit Analog Output: Output Signal Range ......0 V to +10 V, unipolar Number of Outputs ......1 Digital Representation of Output Signal .
  • Page 73 Technical Specifications Analog Value Conditioning Circuits: Input Signal Range ......~10 V Number oflnputs ......4 Galvanic Isolation .
  • Page 74 R 02/92 Technical Specification Power Supply Voltage UP: Rated value ....... . . 24VDC Ripple U~~ .
  • Page 75 Technical Specifications R 02/92 Programmable Controller Slot Designa- in Module Rack 700–OLB Central Controller CR 700–1 S5–115U CR 700–2 CR 700–3 Expansion Device Central Controller S5–1 35L Central Controller S5–1 55L Expansion Device Device S5– 1841 Expansion Device Expansion Device@ The 1P 243 analog module cannot be inserted in central unit S5–150U/S or in ‘: expansion devices ER 701 –1, ER 701 –2, and 187U.
  • Page 76 Table of Contents R 02/92 7 – 1 Overview ............7 –...

  • Page 77: Overview

    Programming Instructions Overview These programming instructions describe the following standard function blocks: FB 160 (PER:ANL) “Read analog module” FB 161 (PER:ANS) “Write analog module” The function blocks, together with the are used in the following programmable controllers. FB 160 FB 161 S5-115U (CPU 941A/B to CPU 944A/B) S5-115H (CPU 942–7UH...) These programming instructions require users to be familiar with sections 1 through 6 and with...

  • Page 78: Function Block Fb160(Per:anl)

    Programming Instructions R 02/92 Function Block FB 160 (PER:ANL) 7.2.1 Function Description The function block “Read analog module” (when the module is outfitted accordingly) accepts the selected analog value and outputs it either as a bit pattern, the way it arrives from the module, or as a 16–bit fixed point numeral, standardized to the respective nominal value.

  • Page 79: Explanation Ofparameters

    Programming Instructions 7.2.3 Explanation of Parameters c h a n n e l n u m b e r I Specification I ‘ Specification of module type (nominal range) Enable signal interrupt PAFE Parameterization error programmable controller. It can only be addressed in the P area.

  • Page 80: Parameterassignment

    R 02/92 Programming Instructions 7.2.4 Parameter Assignment KY = x, y x = Module address for P/Q : KS=P 128< for P/Q: KS=Q 0< X <248 y = Channel number KS = P Normal 1/0 area KS = Q Expanded 1/0 area KF = X Module type;...

  • Page 81: Technical Specifications

    Programming Instructions 7.2.6 Technical Specifications Block no. PER:ANL Block name 15ou/s 155U 115U 135U 4160–A–1 61 60–6–1 51 60–A–2 9160–A–1 Library no. P71200–S... Call length (in words) Block length (in words) Processing time (in msec) CPU 941A/B CPU 922 0.69 Without standardization 8.2/4.9 11.115.9...

  • Page 82: Function Blockapplication

    R 02/92 Programming Instructions The module basic address and the channel number for the analog value are specified by parame- ter BGKN. Depending on the channel number, the function block reads an analog value from the module and outputs it at parameter ADC. The representation of the analog value depends on the NORM parameter: NORM = “O”: The analog value read at the module is output unchanged at parameterADC (as a...

  • Page 83: Function Block Fb161 (Per:ans)

    Programming Instructions R 02/92 Function Block FB 161 (PER:ANS) 7.3.1 Function Description The function block “Write analog module” either transfers a specified bit pattern or a 16–bit fixed–point numeral, standardized to the nominal value, to the module. The function block can also control the binary outputs if the module is outfitted accordingly.

  • Page 84: Explanation Ofparameters

    R 02/92 Programming Instructions 7.3.3 Explanation of Parameters NAME I CLASS I TYPE I DESIGNATION KS I Specification of 1/0 area ‘ NORM I I Specification of the 1/0 area Write digital outputs Specification of the digital outputs addressed in the P area. Module address X, y 128<...

  • Page 85: Data Areaassignment

    Programming Instructions 7.3.5 Data Area Assignment No data blocks are addressed. the Module (S5–155U/H) Addressing 1P 243 For proper operation of the function block, the analog module must be addressed in the address range from KH = FF080 to KH = FF1 FE This corresponds to the 1/0 area from KH = FF080 to KH = FFOFF (byte number 128 to 255) and to the Q range from KH = FF1OO to KH = FFIFF (byte number O to 255).

  • Page 86: Technical Specifications

    R 02/92 Programming Instructions 7.3.6 Technical Specifications Block no. Block name PER:ANS 155U 115U 135U Library no. P71200–S... 5161 –A–O 9161 –A–1 4161 –A–O 6161 –B–1 Call length (in words) Block length (in words) (in msec) CPU 941A/B CPU 922 Without standardization 5.9/3.2 0 .

  • Page 87: Function Blockapplication

    Programming Instructions R 02/92 7.3.7 Function Block Application The module basic address and the channel number of the analog value to be writien are specified at parameter BGKN. The value at parameter DAU is transferred to DAC1, DAC2, or DAC3 accord- ing to the channel number.

  • Page 88: Device Configuration

    R 02/92 Programming Instructions This example shows the operation of the analog module 1P 243. By means of a simulator the indi- vidual functions can be selected (via binary inputs). The signal states can be displayed via binary outputs. The display shows how an analog value applied to the module can be read and how an analog value can be output via the module.

  • Page 89: Jumperassignmentoftheanalog Module

    Programming Instructions 7.4.2 Jumper Assignment of the Analog Module Module Address (Basic Address 160): DIP switch S2: Jumper 3–16 = Jumper 5–14 = =128 Module address 18 17 16 15 14 13 12 11 10 Analog routing: Soldering bases X32 and X29: –...
  • Page 90 R 02/92 Programming Instructions 7.4.3 Assignment of the Inputs and Outputs The program is designed in a way that allows easy adaptation to different input and output assign- ments. The program block (PB 243) that contains the test program works with flags only. The in- puts and outputs to be used are allocated to these flags by organization block OB 1.

  • Page 91: Turn-On, Start-Upbehavior

    Programming Instructions R 02/92 7.4.4 Turn-On, Start-Up Behavior The program is loaded entirely from the floppy disk to the user memory of the programmable con- troller. During start-up there is no need to supply any data to the analog module. Its ready state is indi- cated by the green LED on the front panel.

  • Page 92: Reading Theanalogvalue

    R 02/92 Programming Instructions 7.4.6 Reading the Analog Value The channel numbers from O to 7 are specified via the parameter BGKN of function block FB 160. The LEDs on the module’s front plate indicate the currently selected channel as a bit pattern. The analog value read in the example is transferred to the module through the front panel connec- tor via input IW1 (contact 24) and the appropriate potential contact (contact 23).

  • Page 93: Checking Thecomparators

    R 02/92 Programming Instructions 7.4.7 Checking the Comparators (Pin 16) must be connected with the “+” input of comparator 1 (Pin 20). Furthermore, the output for analog value acquisition AV2 (Pin 15) must be connected with channel 1 of the ADC (Pin 2) and with the “-”...

  • Page 94: Writing Theanalogvalue

    Programming Instructions When the analog routing operations have been performed in single steps so far, they now must be supplemented by the following jumpers: – > (PIN 21) (PIN 25) –> (PIN 26) (PIN 22) (PIN 27) (PIN 23) Via the programmer function “Control variable” a value can be specified via flag word FW 12 which is output as an analog value.

  • Page 95: Addressassignment

    Programming Instructions 7.5.1 Address Assignment For read and write operations the 1P 243 requires an 8–byte address area. These eight bytes are assigned as follows: READ – – – – – – – – (READY-Delay) (READY-Delay) Starting address + 1 –...
  • Page 96 R 02/92 Programming Instructions 7.5.2 Reading and Writing the Inputs and Outputs The descriptions of the individual hardware components also refer to software handling. 1P 243 With an example, this section summarizes the programming commands for the respective ac- cesses. Example for module address 128 with SIMATIC S5 STEP 5 Statement Function...

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