Lvds Receiver - Basler DART BCON SERIES User Manual

Hardware Design Recommendations AW00136902000
6.5

LVDS Receiver

The BCON interface is designed to work with FPGAs as well as Channel Link deserializer devices.
For full speed operation, the FPGA must support a bit rate of at least 560 Mb/s. The Channel Link
deserializer device must support 28 bits and 84 MHz or more.
For a list of suitable Channel Link devices, see the Channel Link Design Guide. The download link
is provided in Section 1.3 on page 2.
48 Basler dart BCON