Data Serialization And Timing - Basler DART BCON SERIES User Manual

AW00136902000
5.2.2

Data Serialization and Timing

BCON data output is serialized using up to 28 bits on up to four data lanes (X0 to X3).
Clock cycle n+1
WordClk
T
BitClk
Output 1 Output 0
X0
(Line 2) (Line 1)
Bit 4
X1
Bit 11 Bit 10
X2
X3 Bit 18 Bit 17
Name
t
*
Time WordClk to DataValid
WDV
t
*
Time DataValid
DV
T
Period of BitClock
BitClk
* Actual t and t depend on T
WDV DV
valid on the camera side. Delays due to cable length, cable skew,
and grabber layout are not taken into account.
Fig. 21: BCON Serialization and Timing
Two bits are reserved for the output signals (Output 0 and Output 1).

They are always transmitted on data lane X0 at position 0 and 1.
Another two bits are reserved for the synchronization signals (FVal and LVal).

They are always transmitted on data lane X0 at position 2 and 3.
The remaining 24 bits are reserved for the image data channel including frame information,

pixel data, and line checksums.
The actual number of bits and active data lanes used depends on the data being transmitted:
Data Transmitted
Frame information
8-bit pixel data
8-bit checksum
12-bit pixel data
12-bit checksum
16-bit pixel data
16-bit checksum
24-bit pixel data
24-bit checksum
Table 14: Data Channel Usage
Basler dart BCON
T
WordClk
MSB
Bit 2 Bit 1
Bit 3 Bit 9 Bit 8
Bit 16 Bit 15
Bit 23 Bit 22
Min Max
-300 ps 300 ps
1100 ps 6542 ps
1/7 T
WordClk
. The given values are only
BitClk
Bits Used Data Lanes Active
Bit 0 - Bit 7 X0, X1
Bit 0 - Bit 11 X0, X1, X2
Bit 0 - Bit 15 X0, X1, X2
Bit 0 - Bit 23 X0, X1, X2, X3
Clock cycle n
Bit 0 FVal LVal
Bit 7 Bit 6 Bit 5
Bit 14 Bit 13 Bit 12
Bit 21 Bit 20 Bit 19
WordClk
t
WDV
-300ps 300ps
X0
...
Bit x+1
X3
BCON Interface
LSB
Output 1 Output 0
(Line 2) (Line 1)
Bit 4 Bit 3
Bit 11 Bit 10
Bit 18 Bit 17
T
BitClk
t
t
DV WDV
Bit x-1
Bit x
33