2 PCB Information
2.1 Physical Specifications
The ADM-PCIE-9V3 complies with PCI Express CEM revision 3.0.
2.2 Chassis Requirements
2.2.1 PCI Express
The ADM-PCIE-9V3 is capable of PCIe Gen 1/2/3 with 1/2/4/8/16 lanes, using the Xilinx Integrated Block for PCI
Express.
2.2.2 Mechanical Requirements
A 16-lane physical PCIe slot is required for mechanical compatibility.
Each ADM-PCIE-9V3 is shipped with a full height PCIe card bracket installed by default. A half-height bracket is
shipped along with the product and can be easily changed out with a Philips screw driver. If the application
requires a low-profile bracket and the order quantity is high, contact sales@alpha-data.com to get the correct
bracket fitted before shipping.
2.2.3 Power Requirements
The PCIe Specification permits a standard low-profile, half-length PCIe card to dissipate up to 25 W of power,
drawn from the PCIe slot. The ADM-PCIE-9V3 may consume more than 25 W of power for larger user FPGA
designs. Power estimation requires the use of the Xilinx XPE spreadsheet and/or a power estimator tool
available from Alpha Data. Please contact support@alpha-data.com to obtain this tool.
The power available to the rails calculated using XPE are as follows:
Voltage
0.85
1.8
3.3
1.2
1.8
0.9
1.2
Page 2
Description
Total Dy
Total Dx (Inc. QSFP Cages)
Total Dz
Weight
Table 1 : Mechanical Dimensions
Source Name
VCC_INT + VCCINT_IO + VCC_BRAM
VCCAUX + VCCAUX_IO + VCC_BRAM + VCCO_1.8V
VCCO_3.3V
VCCO_1.2V
MGTVCCAUX
MGTAVCC
MGTAVTT
Table 2 : Available Power By Rail
ADM-PCIE-9V3 User Manual
Measure
68.9 mm
174 mm
17.45 mm
230 grams
Current Capability
36A
6A
6A
9A
1A
9A
15A
PCB Information
ad-ug-1322_v2_7.pdf
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