Page 22
Pin
Signal Name
Number
AF35
CAPI_TX10_P
AT36
CAPI_TX2_N
AT35
CAPI_TX2_P
AP36
CAPI_TX3_N
AP35
CAPI_TX3_P
AM36
CAPI_TX7_N
AM35
CAPI_TX7_P
AK36
CAPI_TX8_N
AK35
CAPI_TX8_P
AH36
CAPI_TX9_N
AH35
CAPI_TX9_P
AB10
F9
DDR4_0_A0
G9
DDR4_0_A1
D9
DDR4_0_A10
H11
DDR4_0_A11
E8
DDR4_0_A12
J11
DDR4_0_A13
C9
DDR4_0_A14
B11
DDR4_0_A15
K12
DDR4_0_A16
H9
DDR4_0_A17
G11
DDR4_0_A2
D11
DDR4_0_A3
E12
DDR4_0_A4
G10
DDR4_0_A5
F10
DDR4_0_A6
J9
DDR4_0_A7
J8
DDR4_0_A8
F12
DDR4_0_A9
C12
DDR4_0_ACT_N
H7
DDR4_0_ALERT_N
F8
DDR4_0_BA0
H8
DDR4_0_BA1
D10
DDR4_0_BG0
Table 15 : Complete Pinout Table (continued on next page)
CCLK
ADM-PCIE-9V3 User Manual
Bank Voltage
MGT
MGT
MGT
MGT
MGT
MGT
MGT
MGT
MGT
MGT
MGT
1.8
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
Complete Pinout Table
ad-ug-1322_v2_7.pdf
Need help?
Do you have a question about the ADM-PCIE-9V3 and is the answer not in the manual?