Keithley 194 Instruction Manual page 21

GENERAL INFORMATION
As an example, assume that the common mode voltage
is 3OV, and that the CMRR is 60dB. The amount of the
noise signal can be calculated as follows:
3ov
v, = ~
103
v, = 3omv
1.6.6 Crosstalk
The crosstalk specification defines how much of a signal
applied to one A/D module will leak through to the other
A/D module. This signal can be considered as an error or
noise signal that could degrade measurement accuracy.
Thus, crosstalk can be particularly important when
measuring a low level signal on one channel with a high
level signal on another channel.
Like
the CMRR specification, crosstalk is given in dB, with
the higher figure the better. The formula given above for
CMRR can be used to determine how much noise voltage
will appear in a given channel as the result of a signal ap-
plied to an alternate channel. For example, assume that
ZOOV is applied to the channel 2 AID converter. With a 60dB
crosstalk figure, the noise voltage in channel 1 is:
VN = 2oomv
1.6.7 DC Voltage Accuracy and Dynamic
Characteristics
The accuracy figures given in the specifications are for DC
voltages, and do not necessarily apply to AC signals. Cer-
tain dynamic characteristics may affect overall accuracy
when measuring rapidly-changing signals. In particular,
slew rate and settling time could degrade accuracy for
signals with rapid rise and fall times. Slew rate and set-
tling time are discussed elsewhere in this section.
Basic DC accuracy is specified as *(percent of reading +
an offset). Since the offset on a given range is constant,
better accuracy will be achieved when measuring signals
near full range than when measuring lower-level signals.
Thus, for best accuracy, you should use the most sensitive
range possible for the signal being measured.
Note that the accuracy figures given assume that the in-
strument has been properly zeroed. To zero the instru-
ment, simply select ground coupling and press the ZERO
button.
1.6.8 Settling Time
The settling time figure defines the length of time the in-
strument response takes to rise to and stay within certain
limits. This specification includes the input amplifier and
sample and hold circuitry, but excludes the A/D converter
itself.
Figure l-4 demonstrates how to interpret the settling time
figure. Assume that the idealized step function shown in
Figure 1-4(a) is applied to the instrument. A hypothetical
response curve is shown
in
Figure 1-4(b). At point B, the
instrument response rises to within stated limits, but, due
to overshoot, continues to rise to point C. Because of ring-
ing, the response drops slightly under the limit at point
D, then rises to within the final limits and stays there at
point E. Thus, the settling time would be interpreted to
be the time period between the initial stimulus (point A)
and the time the response reaches the stated limits (point
El.
Figure 1-4. Settling Time
1-4