Clock Configuration - Renesas RTK79210**B00000BE User Manual

Sub board, rz family / rz/a series
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RZ/A2M SUB Board RTK79210XXB00000BE
2.7

Clock Configuration

RZ/A2M receives the following three types of clock inputs from the RZ/A2M CPU board.
・RZ/A2M input clock
・RZ/A2M USB clock
・RZ/A2M RTC clock
RZ/A2M receives the following two clock inputs from RTK79210XXB00000BE.
・RZ/A2M audio clock
・RZ/A2M VDC6 clock
Figure 2.7.1 shows clock configuration diagram, and Table 2.7.1 shows the function setting table of DIP switches
SW6-4 and SW6-6 for system setting.
EXTAL
XTAL
24 MHz
(X1)
USB_X1
USB_X2
48 MHz
(X2)
RTC_X1
32.768 kHz
RTC_X2
(X3)
AUDIO_X1
AUDIO_X2
NC
3.3V
DIP
SW1-1
PL_0 /
MD_CLKS
MUX
L=SSCG :OFF, H=SSCG:ON
3.3V
DIP
SW1-2
PL_1 /
MD_CLK
MUX
L=10 ~12MHz,
OFF
Note:
Red text
:Indicates a function not implemented.
:Indicates a SUB board.
Figure 2.7.1
Clock Configuration Diagram
R20UT4398EJ0100 Rev.1.00
2018.10.11
:24 MHz
:48 MHz
:32.768 kHz
:11.2896MHz
:40MHz
RZ/A2M (U1)
SD0_CLK
SD1_CLK
CKIO
PJ_7 /
LCD0_EXTCLK
P7_2 /
DV0_CLK
PJ_6 /
LCD0_CLK
P4_6 /
TXCLKOUTP
P4_7 /
TXCLKOUTM
P6_1 /
VIO_CLK
P6_4 /
AUDIO_CLK
H=20 ~24 MHz
indicates a function used.
microSD card slot (CN1)
SCLK
3.3 V
SD card slot (CN10)
CLK
SDRAM(U30)
CLK
Socket(X5 )
CLK
40 MHz
VDC6 connector (CN15)
DV_CLK
LCD_CLK
MUX
LVDS connector (CN14)
CLK+
CLK-
CMOS camera connector (CN17)
Socket(X 6)
REFCLK
CLK
VIO_CLK
MUX
Socket(X1 )
CLK
11 .2896 MHz
Audio CODEC(U21)
MCLK
2. Function specifications
RL78(U23)
X1
X2
12 MHz
( X3)
Ethernet PHY1(U27)
CKXTAL1
(X4)
CKXTAL2
CLK
50MHz
Ethernet PHY2(U28)
CKXTAL1
CKXTAL2
2-29

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