Nand Flash Memory Interface - Renesas RTK79210**B00000BE User Manual

RZ/A2M SUB Board RTK79210XXB00000BE
2.3.2

NAND Flash Memory Interface

RTK79210XXB00000BE is possible to mount NAND flash memory x 1 shown in Table 2.3.6 on the board pattern.
NAND flash memory control is performed by the RZ/A2M on-chip NAND flash controller
Figure 2.3.2 shows NAND flash memory interface block diagram, and Table 2.3.7 shows the function settings of the
system setting DIP switches SW6-5 and SW6-6.
Table 2.3.6 NAND Flash Memory Overview
Model name
S34ML01G100TFI000
RZ/A2M (U1)
P3_3 / ET1_MDC /
P3_4 / ET1_MDIO /
PK_3 / ET1_RXCLK/REF50CK1 /
PK_2 / ET1_TXD1/RMII1_TXD1 /
PK_1 / ET1_TXD0/RMII1_TXD0 /
PK_0 / ET1_TXEN/RMII1_TXDEN /
P3_5 / ET1_RXD1/RMII1_RXD1 /
PK_4 / ET1_RXD0/RMII1_RXD0 /
P3_1 / ET1_RXER/RMII1_RXER /
P3_2 / ET1_CRS/RMII1_CRSDV /
PH_5 / NAF2 / ET1_EXOUT
PK_5 /
PJ_7 / NAF0 / LCD0_EXTCLK
PJ_6 / FCE / LCD0_CLK
Note: Red text indicates a function used .
：Indicates a function not implemented .
：indicates a SUB board .
Figure 2.3.2 NAND Flash Memory Interface Block Diagram
R20UT4398EJ0100 Rev.1.00
2018.10.11
Bus size
8 bit 128 MBytes
(8 bit x 128 M word)
14
Ether2 / NAND（U14）
P3_3 P3_1
FWE 1A
P3_4 P3_2
FRB 2A
P3_3
PK_3
3A
NAF6
PK_2 P3_4
4A
NAF5
PK_1
OE#
NAF4
PK_0
Ether2 / NAND（U17）
NAF3
P3_5 P3_5
1A
FCLE
PK_4 PH_5
2A
NAF7
P3_1 PK_0
3A
FALE
P3_2 PK_1
4A
FRE
PH_5
OE#
NAF1
NAF1 Ether2 / NAND（U19）
PJ_7 PK_2
1A
PJ_6 PK_3
2A
PK_4
3A
OE#
LCD / NAND（U15）
PJ_6
1A
PJ_7
2A
OE#
ON(L):A=B1, OFF(H): A= B2
NAF1
Capacity
11
14
1B1
FALE
1B2
2B1
FRE
2B2
3B1
FWE
3B2
4B1
FRB
4B2
MUX S
1B1
FCLE
1B2
2B1
NAF2
2B2
3B1
NAF3
3B2
4B1
NAF4
4B2
MUX S
1B1
NAF5
1B2
2B1
NAF6
2B2
3.3V
3B1
DIP
NAF7
SW6-5
3B2
MUX S
OFF
2
1B1
FCE
1B2
3.3V
2B1
DIP
NAF0
SW6-6
2B2
MUX S
OFF
2. Function specifications
FLCTL).
(
Access time
Random: 25 μs (max.
Sequential: 25 ns (min.
To EthernetPHY2
3.3V
NAND flash memory（U31）
FCE
CE#
3.3V
NAF[7:0]
I/O[7:0]
3.3V
FCLE
CLE
3.3V
FALE
ALE
3.3V
FRE
RE#
3.3V
FWE
WE#
FRB
R/B
To LCD I/F
)
)
3.3V
WP#
2-23