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RZ/A2M SUB Board RTK79210XXB00000BE
2.17
DRP Interface
RTK79210XXB00000BE is equipped with a 40 pin MIL connector, which allows interface with the RZ/A2M DRP
interface.
Figure 2.17.1 shows the DRP interface block diagram, and Table 2.17.1 shows the function setting table of DIP
switches SW6-1, SW6-2, and SW6-3 for system setting.
RZ/A2M (U1)
P1_0
P1_0 / D7 /
DRP31
DRP [30:24]
P0_[6:0] / D[6:0] /
DRP[30:24]
DRP [23:21]
P8_[1:3] / A[1:3] /
DRP[23:21]
P8_4
P8_4 / A4 /
DRP20
/ SSL00
DRP19
P8_5 / A5 /
DRP19
/ MISO0
P8_6
P8_6 / A6 /
DRP18
/ MOSI0
P8_7
P8_7 / A7 /
DRP17
/ RSPCK0
P9_0
P9_0 / A8 /
DRP16
/ TxD4
P9_1
P9_1 / A9 /
DRP15
/ RxD4
DRP14
P9_2 / A10 /
DRP14
P9_3
P9_3 / A11 /
DRP13
/ SSIRxD0
P9_4
P9_4 / A12 /
DRP12
/ SSITxD0
P9_5
P9_5 / A13 /
DRP11
/ SSIFS0
P9_6
P9_6 / A14 /
DRP10
/ SSIBCK0
DRP09
P9_7 / A15 /
DRP09
P7_5 / CKE /
DRP08
/ CTS1 /
P7_5
OVRCUR1
DRP07
P7_4 / CAS /
DRP07
/ RTS1
DRP06
P7_3 / RAS /
DRP06
/ TxD1
DRP05
P7_1 / RD/WR /
DRP05
/ RxD1
P7_0 / WE1/DQMU /
DRP04
/
DRP04
SCK1
DRP03
P6_7 / WE0/DQML /
DRP03
DRP02
P6_6 /
DRP02
DRP01
P6_5 / CS3 /
DRP01
P6_4
P6_4 /
DRP00
/ AUDIO_CLK
Figure 2.17.1
DRP Interface Block Diagram
Table 2.17.1
Function Setting Table of DIP Switches SW6-1, SW6-2, and SW6-3 for System Setting
DIP
switch
SW6-1
P1_0 and P0_[6 :0], P8_[7 :1], P9_[7 :0], P7_[5 :3],
P7_[1 :0], P6_7, P6_5 are used as SDRAM control
pins.
SW6-2
P8_4 and P8_[7 :6], P6_4, P9_[6 :3] are used as
DRP pins.
SW6-3
P9_[1 :0] and P1_0, P7_5 are used as DRP pins.
[Note]
indicates setting functions.
R20UT4398EJ0100 Rev.1.00
2018.10.11
32
SDRAM /
Other（DRP）
30
B1
A
B2
MUX×8
OE#
S
ON(L):A=B1, OFF(H):A=B2
3.3V
DIP
SW6-1
OFF
DRP02
P6_4
Note:
Red text
indicates a function used .
：Indicates a function not implemented .
：Indicates a SUB board .
ON
30
To SDRAM
32
DRP
/ Other（U11）
1B1
P9_0
1A
1B2
2B1
P9_1
2A
2B2
3B1
P1_0
3A
3B2
4B1
P7_5
4A
4B2
OE#
MUX
S
DRP
/ Audio（U3）
1B1
P8_4
1A
1B2
2B1
P8_6
2A
2B2
3B1
P8_7
3A
3B2
4B1
P6_4
4A
4B2
OE#
MUX
S
DRP
/ Audio（U6）
1B1
P9_3
1A
1B2
2B1
P9_4
2A
2B2
3B1
P9_5
3A
3B2
4B1
P9_6
4A
4B2
OE#
MUX
S
ON(L):A=B1, OFF(H):A=B2
DRP[30:24]
DRP[23:21]
DRP19
DRP14
DRP09
DRP07
DRP06
DRP05
DRP04
DRP03
DRP02
DRP01
Function
P1_0 and P0_[6 :0], P8_[7 :1], P9_[7 :0], P7_[5 :3],
P7_[1 :0], P6_7, P6_5 are used as DRP pins (default
setting).
P8_4 and P8_[7 :6], P6_4, P9_[6 :3] are used as
audio interface pins (default settings).
P9_[1 :0] and P7_5 are used as UART or USB
interface pins (default settings).
2. Function specifications
3
To UART I/F, USB(ch1)
32
DRP connector（CN2）
DRP16
DRP[31:0]
DRP[31:0]
DRP15
DRP31
3.3V
DRP08
DIP
SW6-3
8
ON
To Audio I / F
DRP20
DRP18
DRP17
DRP00
DRP13
DRP12
DRP11
3.3V
DRP10
DIP
SW6-2
ON
OFF
3.3V
5V
2-42
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