Vdc6 Interface - Renesas RTK79210**B00000BE User Manual

RZ/A2M SUB Board RTK79210XXB00000BE
2.15

VDC6 Interface

RZ/A2M has a digital image signal input pin (DV pin) which supports YCbCr422, YCbCr444, RGB888, RGB666, and
RGB565 images. In addition, there is a digital image signal output pin (LCD pin) which supports a maximum image size
of 1999 pixels (horizontal) by 2035 lines (vertical). On the RTK79210XXB00000BE, there is a 50 pin MIL connector to
connect the DV pins and LCD pins of RZ/A2M.
Figure 2.15.1 shows the VDC6 interface block diagram, and Table 2.15.1 shows the function setting table of DIP
switches SW6-6 and SW6-7 for system setting.
RZ/A2M (U1)
PJ_7 / NAF0 / LCD0_EXTCLK
PJ_6 / FCE / LCD0_CLK
PC_[3:4] / LCD0_TCON[4:3]
P7_2 / DV0_CLK
P7_7 / DV0_HSYNC /
LCD0_TCON0
PB_[5:0] / DV0_DATA[0:5] /
LCD0_DATA[23:18]
PA_7 / DV0_DATA6 /
LCD0_DATA17
PA_6 / DV0_DATA7 /
LCD0_DATA16
PA_5 / DV0_DATA8 /
LCD0_DATA15
PA_4 / DV0_DATA9 /
LCD0_DATA14
PA_[3:0] / DV0_DATA[10:13] /
LCD0_DATA[13:10]
P8_0 / DV0_DATA14 /
LCD0_DATA9
PF_[0:6] / DV0_DATA[15:21] /
LCD0_DATA[8:2]
PH_2 / DV0_DATA22 /
LCD0_DATA1
PF_7 / DV0_DATA23 /
LCD0_DATA0
PD_6 / RIIC3SCL
PD_7 / RIIC3SDA
P7_6 / DV0_VSYNC / GTIOC3A
P5_7 / IRQ3
RES#
Note: Red text indicates a function used .
：Indicates a function not implemented .
：Indicates a SUB board .
Figure 2.15.1 VDC6 Interface Block Diagram
Table 2.15.1 Function Setting Table of DIP Switches SW6-6 and SW6-7 for System Setting
DIP
switch
SW6-6 PJ_[7 :6] is used as VDC6 pin (default setting).
SW6-7 PA_[7 :4] is used as VDC6 pin (default setting).
[Note] indicates setting functions.
R20UT4398EJ0100 Rev.1.00
2018.10.11
35
VDC6 / NAND（U15）
PJ_7 PJ_6
1A
PJ_6 PJ_7
2A
TCON[4:3]
OE# MUX
DVCLK
TCON0
SW6-6
D[23:18]
PA_7
VDC6 / Other（U20）
PA_6 PA_4
1A
PA_5 PA_5
2A
PA_4 PA_6
3A
D[13:10] PA_7
4A
D9
OE# MUX
ON(L):A=B1, OFF(H): A=B2
D[8:2]
D1
SW6-7
D0
D[23:18, 13:0]
SCL3
TCON[4:3, 0]
DVCLK
SCL3
SDA3
SDA3
PWM
INT
PWM
RES#
INT
RES#
ON
2
To NAND flash memory
4
NC
35
LCDCLK
1B1
1B2
EXTCLK
2B1
2B2
S
3.3V
DIP
ON
D14
1B1
1B2
D15
2B1
2B2
D16
3B1
3B2
D17
4B1
4B2
S
3.3V
DIP
ON
Function
PJ_[7 :6] is used as FLCTL pin.
NC
2. Function specifications
2
To EEPROM, CEU I/F
VDC6 connector （CN15）
3.3V
（RSK+RZA1H LCD I/F）
3.3V
SCL3
SCL0
SDA3
SDA0
LCDCLK
LCD0CLK
D[23:0]
LCD0DATA[23:0]
TCON[4:3, 0]
LCD0TCON[4:3, 0]
DVCLK
DV0CLK
PWM
PWM
INT
INT
RES#
RES#
Socket（X5）
EXTCLK
CLK
40MHz
OFF
3.3V
5V
2-40